This paper presents a novel high-gain transimpedance amplifier for flexible radiation sensing systems that can be used as large-area dosimeters. The circuit is implemented with Indium-Gallium-Zinc-Oxide (IGZO) thin-film-transistors (TFTs) and uses two stages for the amplification of the sensor signal (current). The first stage consists of cascode current mirrors with a diode connected load that performs current amplification and voltage conversion. Then, the first stage is followed by a voltage amplifier based on a positive feedback topology for gain enhancement. The proposed circuit converts nano-ampere (10nA) currents into hundreds of millivolts (280mV), showing a gain around 149dB and a power consumption of 0.45mW. The sensed radiation dose level, in voltage terms, can drive the next stages in the radiation sensing system, such as Analog to Digital Converters (ADCs). These radiation sensing devices can find potential applications in real-time, large area, flexible health and security systems.

This paper reports on-chip rail-to-rail timing signals generation thin-film circuits for the first time. These circuits, based on a-IGZO thin-film transistors (TFTs) with a simple staggered bottom gate structure, allow row and column selection of a sensor matrix embedded in a flexible radiation sensing system. They include on-chip clock generator (ring oscillator), column selector (shift register) and row-selector (a frequency divider and a shift register). They are realised with rail-to-rail logic gates with level-shifting ability that can perform inversion and NAND logic operations. These logic gates are capable of providing full output swing between supply rails, VDD and VSS, by introducing a single additional switch for each input in bootstrapping logic gates. The circuits were characterised under normal ambient atmosphere and show an improved performance compared to the conventional logic gates with diode connected load and pseudo CMOS counterparts. By using these high-performance logic gates, a complete rail-to-rail frequency divider is presented from measurements using D-Flip Flop. In order to realize a complete compact system, an on-chip ring oscillator (output clock frequency around 1kHz) and a shift register are also presented from simulations, where these circuits show a power consumption of 1.5mW and 0.82mW at a supply voltage of 8V, respectively. While the circuit concepts described here were designed for an X-ray sensing system, they can be readily expanded to other domains where flexible on-chip timing signal generation is required, such as, smart packaging, biomedical wearable devices and RFIDs.

Security is now becoming a well-established challenge for integrated circuits (ICs). Various types of IC attacks have been reported, including reverse engineering IPs, dumping on-chip data, and controlling/modifying IC operation. IEEE 1149.1, commonly known as Joint Test Action Group (JTAG), is a standard for providing test access to an IC. JTAG is primarily used for IC manufacturing test, but also for in-field debugging and failure analysis since it gives access to internal subsystems of the IC. Because the JTAG needs to be left intact and operational after fabrication, it inevitably provides a “backdoor” that can be exploited outside its intended use. This paper proposes machine learning-based approaches to detect illegitimate use of the JTAG. Specifically, JTAG operation is characterized using various features that are then classified as either legitimate or attack. Experiments using the OpenSPARC T2 platform demonstrate that the proposed approaches can classify legitimate JTAG operation and known attacks with significantly high accuracy. Experiments also demonstrate that unknown and disguised attacks can be detected with high accuracy as well (99% and 94%, respectively).

This study explores the resistive switching phenomena present in 4 µm² amorphous Indium–Gallium–Zinc Oxide (IGZO) memristors. Despite being extensively reported in the literature, not many studies detail the mechanisms that dominate conduction on the different states of IGZO-based devices. In this article, we demonstrate that resistive switching occurs due to the modulation of the Schottky barrier present at the bottom interface of the device. Furthermore, thermionic field emission and field emission regimes are identified as the dominant conduction mechanisms at the high resistive state of the device, while the bulk-limited ohmic conduction is found at the low resistive state. Due to the high complexity associated with creating compact models of resistive switching, a data-driven model is drafted taking systematic steps.

Security is becoming an essential problem for integrated circuits (ICs). Various attacks, such as reverse engineering and dumping on-chip data, have been reported to undermine IC security. IEEE 1149.1, also known as JTAG, is primarily used for IC manufacturing test but inevitably provides a "backdoor" that can be exploited to attack ICs. Encryption has been used extensively as an effective mean to protect ICs through authentication, but a few weaknesses subsist, such as key leakage. Signature-based techniques ensure security using a database that includes known attacks, but fail to detect attacks that are not contained by the database. To overcome these drawbacks, a two-layer learning-based protection scheme is proposed. Specifically, the scheme monitors the execution of JTAG instructions and uses support vector machines (SVM) to identify abnormal instruction sequences. The use of machine learning enables the detection of unseen attacks without the need for key-based authentication. The experiments based on the OpenSPARC T2 platform demonstrate that the proposed scheme improves the accuracy of detecting unseen attacks by 50% on average when compared to previous work.

A multifunctional router IC to be included in the nodes of a wearable body sensor network is described and evaluated. The router targets different application scenarios, especially those including tens of sensors, embedded into textile materials and with high data-rate communication demands. The router IC supports two different functionality sets, one for sensor nodes and another for the base node, both based on the same circuit module. The nodes are connected to each other by means of woven thick conductive yarns forming a mesh topology with the base node at the center. From the standpoint of the network, each sensor node is a four port router capable of handling packets from destination nodes to the base node, with sufficient redundant paths. The adopted hybrid circuit and packet switching scheme significantly improve network performance in terms of end-to-end delay, throughput and power consumption. The IC also implements a highly precise, sub-microsecond one-way time synchronization protocol which is used for time stamping the acquired data. The communication module was implemented in a 4-metal, $0.35~\mu \text{m}$ CMOS technology. The maximum data rate of the system is 35 Mbps while supporting up to 250 sensors, which exceeds current BAN applications scenarios.