Alejandro Medina-Santiago

Alejandro Medina-Santiago

orcid

Research Focus & Metrics

Academic Career Length

19Years (2008-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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1 February 2014 in Journal of Applied Research and Technology
Verified
Journal Article
Open access
AMAlejandro Medina-Santiago
Alejandro Medina-Santiago
JCJ.L. Camas-Anzueto
J.L. Camas-Anzueto
JVJ.A. Vazquez-Feijoo
J.A. Vazquez-Feijoo
HLHéctor Ricardo Hernández-De León
Héctor Ricardo Hernández-De León
RMR. Mota-Grajales
R. Mota-Grajales

29 July 2021 in Sustainability
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Journal Article
Open access
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JLJuan Carlos López-Pimentel
Juan Carlos López-Pimentel
AMAlejandro Medina-Santiago
Alejandro Medina-Santiago
MAMiguel Alcaraz-Rivera
Miguel Alcaraz-Rivera
Carolina Del Valle SotoCarolina Del Valle Soto
Carolina Del Valle Soto
The fast pace of development of the Internet and the Coronavirus Disease (COVID-19) pandemic have considerably impacted the educative sector, encouraging the constant transformation of the teaching/learning strategies and more in technological areas as Educational Software Engineering. Web programming, a fundamental topic in Software Engineering and Cloud-based applications, deals with various critical challenges in education, such as learning continuous emerging technological tools, plagiarism detection, generating innovative learning environments, among others. Continual change and even more change with the current digitization becomes a challenge for teachers and students who cannot depend on traditional educational methods. The article presents a sustainable teaching/learning methodology for web programming courses in Engineering Education using project-based learning adaptable to the continuous web technological advances. The methodology has been developed and improved during 9 years, 15 groups, and 3 different universities. Our results demonstrate that the methodology is adaptable with new technologies that might arise; it also presents the advantages of avoiding plagiarism in students and a personalized induction for every specific student in the learning process.

17 February 2025 in Symmetry
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Journal Article
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JPJosé Guadalupe Pérez-Juárez
José Guadalupe Pérez-Juárez
José R. García-MartínezJosé R. García-Martínez
José R. García-Martínez
AMAlejandro Medina-Santiago
Alejandro Medina-Santiago
ECEdson Cruz
Edson Cruz
LGLuis Fernando Olmedo Garcia
Luis Fernando Olmedo Garcia
MHMiguel Ángel Rojas Hernández
Miguel Ángel Rojas Hernández
Mobile robots represent one of the most relevant areas of study within robotics due to their potential for designing and developing new nonlinear control structures that can be implemented in simulations and applications in specific environments. In this work, a fuzzy steering controller with a symmetric distribution of fuzzy numbers is proposed and designed for implementation in the kinematic model of a non-holonomic mobile robot. The symmetry in the distribution of triangular fuzzy numbers contributes to a balanced response to disturbances and minimizes systematic errors in direction estimation. Additionally, it improves the system’s adaptability to various reference paths, ensuring accurate tracking and optimized performance in robot navigation. Furthermore, this fuzzy logic-based controller emulates the behavior of a classic PID controller by offering a robust and flexible alternative to traditional methods. A virtual environment was also developed using the UNITY platform to evaluate the performance of the fuzzy controller. The results were evaluated by considering the average tracking error, maximum error, steady-state error, settling time, and total distance traveled, emphasizing the trajectory error. The circular trajectory showed high accuracy with an average error of 0.0089 m, while the cross trajectory presented 0.01814 m, reflecting slight deviations in the turns. The point-to-point trajectory registered a more significant error of 0.9531 m due to abrupt transitions, although with effective corrections in a steady state. The simulation results validate the robustness of the proposed fuzzy controller, providing quantitative insights into its precision and efficiency in a virtual environment, and demonstrating the effectiveness of the proposal.

30 December 2019 in IEEE Access
Verified
Journal Article
Open access
AMAlejandro Medina-Santiago
Alejandro Medina-Santiago
AAAna Dalia Pano Azucena
Ana Dalia Pano Azucena
JZJose Manuel Gomez Zea
Jose Manuel Gomez Zea
JJJose Angel Jesus-Magana
Jose Angel Jesus-Magana
MVMaria de la Luz Valdez-Ramos
Maria de la Luz Valdez-Ramos
FFFernando Falcon-Perez
Fernando Falcon-Perez
Currently, the temperature and humidity are important factors for the correct operation and security of electronic devices in a data center. According to the specifications of the International Computer Room Experts Association (ICREA) and the American Society of Heating, Refrigerating and Air Conditioning Engineers (ASHRAE), the temperature must oscillate between 64:4°F and 80°F equal to 18°C and 27°C. The humidity and non-condensing range must oscillate between 40% Relative Humidity (RH), 5:5°C (41:9°F) of Dew Point (DP) to 60% RH, 15°C (59°F) of DP. Considering the mentioned data, a technique, and a method, was developed for real-time measurements based on the fusion of embedded sensors and systems; with connectivity to the communication network in generation of a dedicated database, for information processing; with open software and hardware resources for temperature and humidity monitoring in a data center; located in a region of humid tropical climate, in the south-southeast of Mexico, specifically in the TECNM-Villahermosa. Presents itself the sensor fusion and embedded systems integrate the Internet of Things, to acquire and analyze data in real-time; as well as its communication system, mobile application and web Page developed for a boss of the data center to have in real-time the data generated from the analysis of the sensor network implemented. Graphs of the behavior of the information and the analysis of the data are presented; complying with the cited standards and associations.

3 July 2022 in Sensors
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Journal Article
Open access
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IAIgnacio Algredo-Badillo
Ignacio Algredo-Badillo
MMMiguel Morales-Sandoval
Miguel Morales-Sandoval
AMAlejandro Medina-Santiago
Alejandro Medina-Santiago
CHCarlos Arturo Hernández-Gracidas
Carlos Arturo Hernández-Gracidas
MLMariana Lobato
Mariana Lobato
LRLuis Alberto Morales Rosales
Luis Alberto Morales Rosales
In emergent technologies, data integrity is critical for message-passing communications, where security measures and validations must be considered to prevent the entrance of invalid data, detect errors in transmissions, and prevent data loss. The SHA-256 algorithm is used to tackle these requirements. Current hardware architecture works present issues regarding real-time balance among processing, efficiency and cost, because some of them introduce significant critical paths. Besides, the SHA-256 algorithm itself considers no verification mechanisms for internal calculations and failure prevention. Hardware implementations can be affected by diverse problems, ranging from physical phenomena to interference or faults inherent to data spectra. Previous works have mainly addressed this problem through three kinds of redundancy: information, hardware, or time. To the best of our knowledge, pipelining has not been previously used to perform different hash calculations with a redundancy topic. Therefore, in this work, we present a novel hybrid architecture, implemented on a 3-stage pipeline structure, which is traditionally used to improve performance by simultaneously processing several blocks; instead, we propose using a pipeline technique for implementing hardware and time redundancies, analyzing hardware resources and performance to balance the critical path. We have improved performance at a certain clock speed, defining a data flow transformation in several sequential phases. Our architecture reported a throughput of 441.72 Mbps and 2255 LUTs, and presented an efficiency of 195.8 Kbps/LUT.

24 May 2018 in IET Circuits, Devices & Systems
Verified
Journal Article
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PDF file
AMAlejandro Medina-Santiago
Alejandro Medina-Santiago
MRMario Alfredo Reyes‐Barranca
Mario Alfredo Reyes‐Barranca
IAIgnacio Algredo‐Badillo
Ignacio Algredo‐Badillo
AMAlfonso Martinez-Cruz
Alfonso Martinez-Cruz
KGKelsey Alejandra Ramírez Gutiérrez
Kelsey Alejandra Ramírez Gutiérrez
ACAdrián Eleazar Cortés‐Barrón
Adrián Eleazar Cortés‐Barrón
In recent years, there is a trend towards the development of reconfigurable circuits where devices using them offer flexibility and performance. Different technologies are explored, such as threshold logic gates (TLGs), which are one of the most promising future technologies, and researchers are examining and improving different characteristics such as density, performance and power dissipation. This research presents a 4‐bit arithmetic logic unit (ALU), which was designed using TLGs through reconfigurable logic blocks with a universal circuit configured with three stages based on a floating‐gate metal oxide semiconductor transistor with more than one control gate, which was named neu‐complementary metal oxide semiconductor ( ν ‐CMOS). The main contribution is that this device is configured as a ν ‐CMOS inverter and has the ability to program the threshold voltage of its transfer curve by applying an external voltage to the additional control gates. The number of input bits and the magnitude of the weighted input capacitances related to control gates of the ν ‐CMOS inverters is obtained and analyzed by using the graphical method (floating‐gate potential diagram). Finally, the proposed 4‐bit ALU shows similar results as those measured from the ALUs implemented in the field programmable gate array evaluation kit and the Motorola chip MC14581B.