The development of brain-inspired spiking neural networks (SNNs) has great potential for neuromorphic edge computing applications, while challenges remain in optimizing power-efficiency and silicon utilization. Neurons, synapses and spike-based learning algorithms form the fundamental information processing mechanism of SNNs. In an effort to achieve compact and biologically plausible SNNs while restricting power consumption, we propose a set of new neuromorphic building circuits, including an analog Leaky Integrate-and-Fire (LIF) neuron circuit, configurable synapse circuits and Spike Driven Synaptic Plasticity (SDSP) learning algorithm circuits. Specifically, we explore methods to minimize large leakage current and device mismatch effects, and optimize the design of these neuromorphic circuits to enable low-power operation. A reconfigurable mixed-signal SNN is proposed based on the building circuits, allowing flexible configuration of synapse weights and attributes, resulting in enhanced SNN functionality and reduced unnecessary power consumption. This SNN chip is fabricated using 55 nm CMOS technology, and test results indicate that the proposed circuits have the ability to closely mimic the behaviors of LIF neurons, synapses and SDSP mechanisms. By configuring synaptic arrays, we established varied connections between neurons in the SNN and demonstrated that this SNN chip can implement Pavlov’s dog associative learning and binary classification tasks, while dissipating less energy per spike of the order of Pico Joules per spike at a firing rate ranging from 30 Hz to 1 kHz. The proposed circuits can be used as building blocks for constructing large-scale SNNs in neuromorphic processors.

Recent years have seen an increasing popularity in the development of brain-inspired neuromorphic hardware for neural computing systems. However, implementing very large scale simulations of neural networks in hardware is still an open challenge in terms of power efficiency, compactness, and biophysical resemblance. In an effort to design biologically plausible spiking neuron circuits while restricting power consumption, we propose a new subthreshold Leaky Integrate-and-Fire (LIF) neuron circuit designed using 22 nm FDSOI technology. In this circuit, problems of large leakage currents and device mismatch are effectively reduced by deploying the back-gate terminal of FDSOI technology for a tunable design. The proposed neuron is able to operate in two spiking frequency modes with tunable bias parameter setting of key transistors, and it results in complex firing behaviors, such as adaptation, chattering, and bursting, through varying bias voltages. We present circuit post-layout simulation results and demonstrate the biologically plausible neural dynamics. Compared with published state-of-the-art neuron circuits, the circuit dissipates ultra-low energy per spike, on the order of femtojoules per spike, at firing rates ranging from 30 Hz to 1 kHz. Furthermore, the circuit is proven to maintain a good robustness over process variation and Monte Carlo analysis, with relative error 3.02% at a firing rate of approximately 67.1 Hz.

The 1-Mb and 4-Mb commercial toggle magnetoresistive random-access memories (MRAMs) with and 0.18- complementary metal–oxide–semiconductor (CMOS) process respectively and different magnetic tunneling junctions (MTJs) are irradiated with a Cobalt-60 gamma source. The electrical functions of devices during the irradiation and the room temperature annealing behavior are measured. Electrical failures are observed until the dose accumulates to 120-krad (Si) in 4-Mb MRAM while the 1-Mb MRAM keeps normal. Thus, the 0.13- process circuit exhibits better radiation tolerance than the 0.18- process circuit. However, a small quantity of read bit-errors randomly occurs only in 1-Mb MRAM during the irradiation while their electrical function is normal. It indicates that the store states of MTJ may be influenced by gamma radiation, although the electrical transport and magnetic properties are inherently immune to the radiation. We propose that the magnetic Compton scattering in the interaction of gamma ray with magnetic free layer may be the origin of the read bit-errors. Our results are useful for MRAM toward space application.

The ongoing trend towards miniaturization and increased packaging density has exacerbated the reliability problem of Au-Al heterogeneous metal bonding structures in high-temperature environments, where extreme temperatures and high current pose a serious challenge. In order to address this issue, the present study aims to investigate the electromigration reliability of Au-Al bonding by comparing the conventional heterogeneous contacts with OPM structures, which are homogeneous contacts. A novel bonding layout was developed to precisely detect the resistance and obtain stage changes in electromigration. The experimental results demonstrated that the relative resistance shift of Au-Al bonding at 250 °C was 98.7%, while CrAu and NiPdAu OPM structures exhibited only 46.1% and 2.93% shifts, which suggests that the reliability of OPM structures was improved by a factor of 2.14 and 33.6, respectively. The degradation of Au-Al bonding was attributed to the large cracks observed at the bonding interface and lateral consumption of Al elements. In contrast, OPM structures only exhibited tiny voids and maintained a better bonding state overall, indicating that homogeneous metal contacts have better immunity to electromigration. Furthermore, this study also observed the polarity effect of electromigration and analyzed the impact of NiPdAu thickness on reliability. Overall, this research provides a novel approach and an insightful theoretical reference for addressing the bottleneck of high-temperature electromigration reliability in high-temperature sensor packaging.