Jialong Zeng

Dr. Jialong Zeng

Aerospace Information Research Institute, Beijing, China
orcid

Research Focus & Metrics

Academic Career Length

5Years (2022-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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9 January 2023 in IEEE Microwave and Wireless Technology Letters
Verified
Journal Article
Closed access
JLJiaxuan Li
Jiaxuan Li
YYYang Yuan
Yang Yuan
JZJialong Zeng
Jialong Zeng
DHDing He
Ding He
Zhongjun YuZhongjun Yu
Zhongjun Yu
This letter presents a broadband multistage low-noise amplifier (LNA) in a 0.15- $\mu $ m GaAs pseudomorphic high-electron-mobility (pHEMT) process. The LNA employs multiple bandwidth extension techniques, including cascode, feedback, and gain-enhanced source–drain coupled line (SDCL). The SDCL enhances the gain by combining the source and drain signals and compensates the gain roll-off of the amplifier, which is first proposed in this letter to our knowledge. These techniques are adopted in a three-stage monolithic microwave integrated circuit (MMIC) LNA, achieving a wide bandwidth with high gain. The measured results show that the LNA obtains an average gain of 24.7 dB and a noise figure (NF) of 1.7–2.8 dB in 0.5–24 GHz, with a compact chip area of only 1.47 mm $^{2}$ .

6 February 2023 in IEEE Access
Verified
Journal Article
Open access
JLJiaxuan Li
Jiaxuan Li
JZJialong Zeng
Jialong Zeng
YYYang Yuan
Yang Yuan
DHDing He
Ding He
JFJingxin Fan
Jingxin Fan
Zhongjun YuZhongjun Yu
Zhongjun Yu
This paper analyzes the main factors limiting the bandwidth expansion of low-noise amplifiers (LNA) and designs a broadband LNA with a bandwidth of 2-40.5 GHz. The LNA is designed using multiple bandwidth expansion methods, including cascode, resistance feedback, and cascode Darlington amplifier. The amplitude-frequency characteristics and bandwidth expansion principle of the three structures are studied theoretically based on the small-signal equivalent circuit model. Thanks to these techniques, a three-stage LNA is designed in a 0.15-μm GaAs pseudomorphic high-electron-mobility (pHEMT) process. The measured results show that the designed LNA achieves an average gain of 21.6 dB in 2-40.5 GHz while maintaining a noise figure (NF) below 3.6 dB. The measured output 1-dB gain compression point (OP1 dB) is from 4.5 to 12.8 dBm and the input/output return loss are better than 5 dB. The chip area is only 1.57 mm 2 , including input and output test pads.

9 August 2023 in IEEE Transactions on Circuits and Systems II: Express Briefs
Verified
Journal Article
Closed access
YYYang Yuan
Yang Yuan
BYBin Yuan
Bin Yuan
JLJiaxuan Li
Jiaxuan Li
ZWZijian Wang
Zijian Wang
JZJialong Zeng
Jialong Zeng
Zhongjun YuZhongjun Yu
Zhongjun Yu
In this brief, a three-stage broadband cascode low noise amplifier (LNA) is proposed with transformer feedback and Darlington techniques. The first two stages use transformer feedback to provide low-frequency gain, and the Darlington structure is employed in the third stage to compensate for highfrequency gain. The additional transmission poles introduced by the transformer feedback increase the freedom of gain tuning with little effect on low-frequency gain, therefore facilitating the design of broadband LNAs. To verify the feasibility of bandwidth expansion of these two structures, the proposed LNA is designed and fabricated in a 0.15-μm GaAs pseudomorphic high electron mobility transistor (pHEMT) technology. The measured results show that the proposed LNA achieves an average gain of 23.4 dB and a minimum noise figure (NF) of 2.1 dB in the operating band from 0.5 GHz to 30 GHz. The power consumption of the LNA is 246 mW at 6 V/ -0.6 V DC bias. The LNA has a compact chip size with an area of 2.2 × 0.7 mm2, including test pads.

29 December 2022 in IEEE Access
Verified
Journal Article
Open access
YYYang Yuan
Yang Yuan
JZJialong Zeng
Jialong Zeng
DZDesheng Zhang
Desheng Zhang
JLJiaxuan Li
Jiaxuan Li
DHDing He
Ding He
Zhongjun YuZhongjun Yu
Zhongjun Yu
This paper presents a high-accuracy multifunction chip (MFC) with amplitude and phase control in X-band. The MFC is designed with a common leg structure and incorporates a 6-bit attenuator (ATT), a 6-bit phase shifter (PS), two gain compensation amplifiers (GCAs), three single pole double throw switches (SPDTs), and fourteen logic control circuits. However, cascading these blocks causes the change of the terminal impedances of the ATT and PS, which is detrimental to the accuracy. To solve this problem, the extra tunable interstage matching networks (IMNs) are introduced between each ATT and PS cell to alleviate the terminal impedance changes. The compensation capacitances are also applied to ATT to reduce the insertion phase shift. The receive and transmit modes switching is achieved by using four SPDTs. In addition, the resistance feedback is used in GCAs to compensate for passive losses and provide gain to the MFC. To validate the design scheme, the proposed MFC is fabricated in 0.15-μm GaAs pseudomorphic high-electron-mobility transistor (pHEMT) process. The measured results show that the MFC has excellent accuracy due to the introduction of IMNs. In the range of 8-11 GHz, the measured maximum root-mean-square (RMS) amplitude error of the MFC is less than 0.28 dB, and the maximum RMS phase error is less than 3.3°. Moreover, the MFC is achieved with a compact layout of 4.3 mm × 2.85 mm. Excellent performance and compact size make the MFC greatly potential in spaceborne phased array applications.

31 March 2023 in IEEE Transactions on Circuits and Systems II: Express Briefs
Verified
Journal Article
Closed access
YYYang Yuan
Yang Yuan
JLJiaxuan Li
Jiaxuan Li
BYBin Yuan
Bin Yuan
JZJialong Zeng
Jialong Zeng
JFJingxin Fan
Jingxin Fan
Zhongjun YuZhongjun Yu
Zhongjun Yu
A gain-enhanced technique with output-stage transformer feedback (OSTF) for the low-noise amplifiers is proposed in this brief. The transformer is realized by a pair of magnetically coupled microstrip lines between the drain and source stages, one of which acts as a series-peaking inductor and the other as a source degenerate inductor. By adjusting the length and gap of the magnetically coupled microstrip lines, the tuning of the gain in high frequency is realized. To verify the proposed OSTF gain-enhanced scheme, two LNAs with the same structure are designed, with one having OSTF and the other not. The gainenhanced wideband LNA with OSTF is fabricated in 0.15-GaAs pseudomorphic high-electron mobility transistor process. The total chip area, including input and output testing pads, is 1.24 mm2. The simulated results show excellent performance with a maximum gain improvement of 3-dB at 20 GHz. The measured results show that the gain-enhanced LNA has an average gain of 22.6 dB and a noise figure below 2 dB from 1 to 20 GHz, which are in good agreement with simulated ones.

12 November 2022 in Microwave and Optical Technology Letters
Verified
Journal Article
Closed access
JZJialong Zeng
Jialong Zeng
CXChunshuang Xie
Chunshuang Xie
DZDesheng Zhang
Desheng Zhang
JFJie Feng
Jie Feng
CTCheng Tan
Cheng Tan
Zhongjun YuZhongjun Yu
Zhongjun Yu