Due to the rise of 5G, IoT, AI, and high-performance computing applications, datacenter traffic has grown at a compound annual growth rate of nearly 30%. Furthermore, nearly three-fourths of the datacenter traffic resides within datacenters. The conventional pluggable optics increases at a much slower rate than that of datacenter traffic. The gap between application requirements and the capability of conventional pluggable optics keeps increasing, a trend that is unsustainable. Co-packaged optics (CPO) is a disruptive approach to increasing the interconnecting bandwidth density and energy efficiency by dramatically shortening the electrical link length through advanced packaging and co-optimization of electronics and photonics. CPO is widely regarded as a promising solution for future datacenter interconnections, and silicon platform is the most promising platform for large-scale integration. Leading international companies (e.g., Intel, Broadcom and IBM) have heavily investigated in CPO technology, an inter-disciplinary research field that involves photonic devices, integrated circuits design, packaging, photonic device modeling, electronic-photonic co-simulation, applications, and standardization. This review aims to provide the readers a comprehensive overview of the state-of-the-art progress of CPO in silicon platform, identify the key challenges, and point out the potential solutions, hoping to encourage collaboration between different research fields to accelerate the development of CPO technology. Graphical Abstract

This paper presents a hybrid-integrated optical transceiver front-end for beyond-400G short-reach optical links. A pair of the monolithic 8-channel laser drivers and the trans-impedance amplifier (TIA) is developed in 180nm SiGe BiCMOS, incorporating arrayed Vertical-Cavity-Surface- Emitting Lasers and photo-detectors. The driver uses a $2^{\mathrm {nd}}$ -order continuous-time linear equalizer (CTLE) to compensate for the channel loss with a nonlinear frequency response. Both the inductive peaking and RC-degeneration are embedded at the output stage to extend the optical modulation bandwidth (BW). The series-peaking and multi-stage distributed CTLE are combined in a resistive feedback TIA topology for improved BW and linearity. Measurement results show up to 100-Gb/s PAM-4 electrical eyes of the driver and TIA. The optical transmitter front-end operates 56 Gb/s, 4.1-dB extinction ratio, and 6.6-pJ/bit power efficiency, while the optical receiver front-end achieves 56-Gb/s, $10^{-6}$ bit error rate, and 5.9-pJ/bit power efficiency.

In this letter, we experimentally demonstrated a 1550-nm high-power single-longitudinal-mode (SLM) distributed feedback (DFB) semiconductor laser based on sampled moiré grating (SMG). By designing sampling structure with micrometer scale, moiré grating (MG) can be equivalently realized along laser cavity. Then, we can reduce coupling coefficient near laser facet so as to increase output power. The cavity length and ridge width of the fabricated laser are 1.0 mm and 3.0 μ m, respectively. The measured threshold current and the slope efficiency are 30.0 mA and 0.36 mW/mA at the heat-sink temperature of 25 oC, respectively. When the injection current is 800.0 mA, the maximum output power is about 183.0 mW. The saturation power is significantly improved compared with conventional DFB laser with uniform sampled grating (USG), which was fabricated on the same wafer. In addition, a four-channel DFB laser array based on SMG was also fabricated on the same wafer, showing good wavelength uniformity.

Ge-on-silicon-on-insulator p-i-n photodetectors were fabricated using an ultralow-temperature Ge buffer by ultrahigh-vacuum chemical vapor deposition. For a detector of 70-m diameter, the 1-dB small-signal compression power was about 110.5 mW. The 3-dB bandwidth at 3-V reverse bias was 13.4 GHz.

Recently, the interconnection bandwidth of the data center is rapidly increasing. To satisfy the requirement for the high-performance data center, a 4-channel 2.5D silicon photonic transmitter is proposed and the packaging structure could increase the high-density scalability of the architecture for 1.6T/3.2T co-packaging optics (CPO) module. The electrical driver and silicon photonic Mach-Zehnder modulator (MZM) are mounted to the silicon interposer by the micro-bumps. Meanwhile, the silicon interposer is mounted to the low temperature co-fired ceramic by the solder balls. The 2.5D transmitter is assembled to the motherboard by the high-speed ball grid array (BGA) connector to make it convenient to be replaced. The electrical optimization is implemented to make the insertion loss of the whole passive link within −1.55 dB under 40 GHz, which ensures the transmitter with the socket transmit the clear simulated eye diagram at 64 Gbps PAM4 rate per channel. Moreover, the thermal evaluation is performed, which includes the heat- dissipation evaluation and the thermal-induced impact on the edge light coupling. Finally, the substrates in the 2.5D transmitter are fabricated and the transmitter is realized by the improved assembly method. By the verification of the measurement, the 2.5D transmitter we proposed could work at 64 Gbps PAM4 signal transmission rate per channel with the 6pJ/bit power consumption. Regardless of the bandwidth of the electronic integrated circuit (EIC)/MZM and the BGA connector, based on the simulation electrical bandwidth, it is potential for realizing 100 Gbps PAM4 signal transmission.

3D integration photonic interposer is becoming popular in the field of co-packaging optics (CPO). In this paper, we integrate the edge coupler and through silicon via (TSV) into the silicon interposer. Different high-frequency transmission lines are designed, analyzed and simulated. The measured results and the simulation have a good correspondence. The high frequency transmission lines, which consist of 10 μm × 100 μm TSVs and two redistribution layer (RDL) lines of 100 μm on the top layer and one 100 μm RDL line on the bottom layer, shows perfect insertion loss less than 0.35 dB @67 GHz. In addition, the 56GBaud (112Gbps) eye diagram is tested and shows excellent transmission quality. Edge couplers are designed and fabricated by packaging process. The coupling loss of coupler is less than 1.7 dB/facet. The 3D optical package module based on the active optical interposer has also been realized and verified.