The study presented in this paper contributes to quantification of the correlations between resistance degradation and Al metallization layer reconstruction observed in high-power insulated gate bipolar transistor (IGBT) modules during power cycling. The microstructure evolution that occurs in the Al metallization layer during power cycling was investigated via electron and ion microscopy, and the surface roughness was measured and used to characterize the Al metallization degradation. An electrical four-point probe method was used to examine the change in the electrical parameter (resistance) of the Al metallization layer in the IGBT modules. The effect of Al metallization layer reconstruction on its electrical performance was investigated by experimental observation and finite element analysis (FEA). The results show that both the Al metallization layer surface morphology and cracks propagating across the Al metallization layer thickness significantly affect the metallization resistance. In the initial and mid-point stages of power cycling, the increase in the Al metallization layer resistance is consistent with the surface roughness evolution. Near the ultimate lifetime of the IGBT module, the change in the resistance strongly depends on the crack density.

Nanocrystalline copper (Cu) is considered to be one of the best interconnected material in integration circuit (IC) industry, because of its ultra-low resistivity and high mechanical stability. Mechanical properties of nanocrystalline Cu are completely different from those of bulk monocrystalline Cu. These properties are of high importance in the assessment of the thermo-mechanical reliability of the interconnected IC structure. To investigate the effects of the grain sizes and temperature on the mechanical properties of nanocrystalline Cu, molecular dynamics simulations of uniaxial tensile test are performed in this study. The results show that the elastic modulus of nanocrystalline Cu with grain sizes of 4.65–12.41 nm gradually increases with the increase of the mean grain sizes, the corresponding flow stress concurrently increases, and the flow stress is proportional to the square-root of the grain size, which satisfies the inverse-Hall–Petch relation. Furthermore, the elastic modulus linearly decreases with the increase of temperature. The coupled effect of the flow stress, strain rate and temperature were elaborated by the Arrhenius hyperbolic sinusoidal model. Meanwhile, the deformation activation energy of nanocrystalline Cu for various grain sizes were obtained. All of the tensile simulation tests confirmed that the mechanism of plastic deformation for nanocrystalline Cu with 4.65–12.41 nm grain sizes is mainly specific to the grain boundary sliding and grain rotation. The dislocation nucleation and migration, which is usually the deformation mechanism of plasticity for macroscopic materials, is no longer the dominant factor for nanocrystalline Cu.

This paper investigates the formation and the growth of the intermetallic compound (IMC) layer at the interface between the Sn3.0Ag0.5Cu Pb-free solder and the Cu substrate during isothermal aging at 150 °C. We measure the thickness of the IMC layer and the roughness of the solder/IMC interface, and these two factors are assumed to control the tensile behavior of the solder joints. First, it utilizes the tensile tests of the aged solder joints for analyzing the effect of the IMC growth on the tensile behavior of the solder joints. Then, the microcracking behavior of the IMC layer is investigated by finite element method (FEM). In addition, qualitative numerical simulations are applied to study the effect of the IMC layer thickness and the solder/IMC interfacial roughness on the overall response and the failure mode of solder joints. The experimental results indicate that when the aging time increases, both the thickness and the roughness of the IMC layer have a strong influence on the strength and the failure mode of solder joints. The numerical simulation results suggest that the overall strength of solder joints is reduced when the IMC layer is thick and the solder/IMC interface is rough, and the dominant failure mode migrates to the microcracks within the IMC layer when the IMC layer is thick and the solder/IMC interface is flat.

In this article, the correlation between the thermal contact resistance and the surface roughness characteristics of the contact interface in the press-pack insulated-gate bipolar transistor (PP-IGBT) modules during power cycling was studied by experimental measurements and finite-element (FE) simulation-based factorial design analysis. Thermal transient test technology was applied to examine the change in the thermal characteristic parameters of the PP-IGBT module. This shows that the increase in the thermal contact resistance of the Al metallization/emitter Mo contact interface occurs more dramatically during power cycling. A 3-D surface profilometer was used to evaluate the surface morphology parameters of the Al metallization/emitter Mo contact interface. The equivalent root-mean-square (RMS) roughness increases during power cycling, and the equivalent asperity slope and the equivalent spacing between asperities increase slightly. Additionally, the surface roughening in the corner area of the chip is more obvious than in other regions. A fractional factorial design analysis based on FE simulations was performed. The results indicate that the thermal contact resistance strongly depends on the main effects of the real contact area and the spacing between the asperities, and the RMS roughness and the asperity slope interaction.