This article presents a 36-channel scanning light detection and ranging (LiDAR) sensor with an on-chip single-photon avalanche diode array. The sensor has an area-efficient 11-bit in situ histogramming time-to-digital converter with a 3000 ×78 μm ² per channel area based on a mixed-signal accumulator, though it is incorporated with histogramming and filtering capabilities. Furthermore, owing to its embedded interference (IF) filter, the sensor can perform reliable direct time-of-flight measurements even with IF from 32 different LiDAR sensors. The LiDAR system also has a beam scanner that comprises dual laser diodes for IF elimination and a hybrid mirror such that high-resolution images with a resolution of 2200 ×36 can be acquired with a wide field-of-view of 120 ^° ×8 ^° .

In this paper, the role of pad topography on material removal rate (MRR) in chemical-mechanical polishing (CMP) is investigated. First, based on the mechanics of pad/particle and particle/wafer sliding contacts at an asperity of the polishing pad a new MRR model is developed. The model is then extended to multi-asperity contacts, taking into account the statistics of the asperity heights. The single-asperity model reveals that the removal rate at relatively low pressure strongly depends on the pressure and the area at a sliding asperity contact. However, removal rate per asperity becomes independent of the contact pressure once it exceeds a critical value, which is determined by the asperity hardness and the particle concentration. Material removal by multi-asperity sliding contacts increases due to the increase in real contact area, provided a large number of asperity contacts at pressures greater than the critical. The plasticity index is identified as a key parameter that determines the contact area ratio and proportion of asperities in contact at pressures greater than the critical, thus the overall MRR. The model suggests that MRR in CMP can be greatly increased by controlling the surface topography of the pads. Results of polishing experiments on Cu thin films validate the model.

This article presents a 320 x 240 indirect time-of-flight (iToF) CMOS image sensor (CIS) with on-chip motion artifact suppression and background light cancelling (BGLC). The proposed iToF CIS uses a backside-illuminated trident pinned photodiode (PPD) that assists charge transfer with a built-in lateral electric field for enhanced depth accuracy. To overcome the limitation of the conventional iToF CIS that exhibits motion artifact, we propose a pseudo-four-tap (P4-tap) demodulation method with alternate phase driving using a conventional two-tap pixel structure with a high fill factor of over 43%. In addition, by combining the advantages of both the P4-tap and conventional two-tap demodulation schemes, we propose hybrid depth imaging with reduced motion artifact for moving objects, while providing high-depth precision for the static background. For outdoor mobile applications of the iToF CIS, we integrated on-chip BGLC circuits to eliminate the BGL-induced depth error. A prototype chip is fabricated using a 90-nm backside illumination (BSI) CIS process. The BSI trident PPD enabled a low depth error of under 0.54% over the range of 0.75-4 m, with a modulation frequency of 100 MHz. Motion artifact was suppressed at 60 frames/s of hybrid depth imaging owing to the proposed P4-tap scheme. With the on-chip BGLC circuit, the experimental results demonstrate a 0.55% depth error at a 1-m distance, even under 120-klx BGL illumination.

This paper proposes a 32.7 kHz self-biased wake-up timer using temperature-insensitive resistive current. A dual-loop structure with supply-regulation loop and frequency-locked loop determines the regulated voltages at both ends of a temperature-compensated resistor and cancels out the amplifier offset voltages, thus generating temperature-insensitive resistive current for the switched capacitor. Moreover, a self-biasing scheme in low-power design reduces the power variation across the temperature range and eliminates the necessity of a sub-μA reference current generator. The proposed timer with its start-up circuit generates <12 ms lock time, which is 20 times less than what obtained without a start-up circuit, and exhibits a long-term frequency stability of 10 ppm and a temperature coefficient of 13.2 ppm/°C with an energy efficiency of 1.08 nW/kHz.

A 4-GHz sub-harmonically injection-locked phase-locked loop (ILPLL) with on-chip calibration is presented. The injection timing and pulsewidth of the injected pulse are self-calibrated to achieve low phase noise. The phase noise of the proposed ILPLL was -112.3 dBc/Hz at 1-MHz offset frequency, whereas that of the conventional PLL was -104.8 dBc/Hz. The measured integrated jitter from 10 kHz to 30 MHz was 710 fs, and the corresponding reference spur level was -61.6 dBc with the proposed calibration technique. Fabricated in a 28-nm CMOS process, the proposed ILPLL occupies 0.09 mm². Operating at 4 GHz, it consumes 11.4 mW from a 1.0-V power supply.

This article presents a flash light detection and ranging (LiDAR) sensor featuring an in-pixel histogramming time-to-digital converter (hTDC) based on a delta-intensity quaternary search (DIQS) technique. The proposed 12-b DIQS hTDC is a two-step converter consisting of a 6-b coarse hTDC and a 7-b fine hTDC with 1-b redundancy. The DIQS hTDC synthesizes depth maps with three subframes from the coarse mode and a single subframe from the fine mode, achieving 100-ps resolution without a clock frequency of a few gigahertz. The DIQS repeats dividing the time range of a current step into four periods and finding the location where a target object is placed by comparing the number of events in each period, which is similar to the binary search method but doubles its operating speed. Two time-of-flight (ToF) bits are consecutively determined in every coarse step, and seven ToF bits are estimated by the indirect ToF technique with photon counts. An up–down counter is employed to reduce the memory size by half and enable the delta-intensity technique that can extend the dynamic range by suppressing the uniform background light. The prototype LiDAR with an $80\times60$ pixel array was fabricated in a 110-nm CMOS image sensor (CIS) process and fully characterized. The maximum detectable range is measured to 45 m with a success rate of 100% at night and 60% under 70-klux background light. The depth accuracy and precision are 2.5 and 1.5 cm from 3 to 4.5 m indoor, respectively, and the precision is maintained to 1.8 cm for the target located at a 1.5-m distance under 60-klux background light. Inherent time-gating and differential signaling of the DIQS hTDC effectively suppress common-mode noise, accomplishing real-time acquisition of depth images with 30 frames/s in a 9-m range at 30-klux background light.