This article presents a 36-channel scanning light detection and ranging (LiDAR) sensor with an on-chip single-photon avalanche diode array. The sensor has an area-efficient 11-bit in situ histogramming time-to-digital converter with a 3000 ×78 μm ² per channel area based on a mixed-signal accumulator, though it is incorporated with histogramming and filtering capabilities. Furthermore, owing to its embedded interference (IF) filter, the sensor can perform reliable direct time-of-flight measurements even with IF from 32 different LiDAR sensors. The LiDAR system also has a beam scanner that comprises dual laser diodes for IF elimination and a hybrid mirror such that high-resolution images with a resolution of 2200 ×36 can be acquired with a wide field-of-view of 120 ^° ×8 ^° .

We present a real-time electroencephalogram (EEG) based depth of anesthesia (DoA) monitoring system in conjunction with a deep learning framework, AnesNET. An EEG analog front-end (AFE) that can compensate ±380-mV electrode DC offset using a coarse digital DC servo loop is implemented in the proposed system. The EEG-based MAC, EEGMAC, is introduced as a novel index to accurately predict the DoA, which is designed for applying to patients anesthetized by both volatile and intravenous agents. The proposed deep learning protocol consists of four layers of convolutional neural network and two dense layers. In addition, we optimize the complexity of the deep neural network (DNN) to operate on a microcomputer such as the Raspberry Pi 3, realizing a cost-effective small-size DoA monitoring system. Fabricated in 110-nm CMOS, the prototype AFE consumes 4.33 μW per channel and has the input-referred noise of 0.29 μVrms from 0.5 to 100 Hz with the noise efficiency factor of 2.2. The proposed DNN was evaluated with pre-recorded EEG data from 374 subjects administrated by inhalational anesthetics under surgery, achieving an average squared and absolute errors of 0.048 and 0.05, respectively. The EEGMAC with subjects anesthetized by an intravenous agent also showed a good agreement with the bispectral index value, confirming the proposed DoA index is applicable to both anesthetics. The implemented monitoring system with the Raspberry Pi 3 estimates the EEGMAC within 20 ms, which is about thousand-fold faster than the BIS estimation in literature.

A capacitively-coupled chopper instrument amplifier (CCIA) for bio-potential monitoring analog front-end (AFE) with auto-calibrated dual positive feedback loops (DPFLs) is presented in this article. The proposed AFE with the DPFL does not only prevent total input impedance degradation by unexpected external and internal parasitic capacitances but also achieves excellent noise efficiency simultaneously. The DPFL consists of a conventional internal positive feedback loop with an attenuator for enhancing calibration resolution and an external positive feedback loop outside of the input chopper to compensate for a large external parasitic capacitance ( $C_{P-EXT}$ ), boosting total input impedance significantly. To precisely determine the feedback factor of the DPFL with respect to parasitic capacitors, an on-chip foreground calibration is also implemented in this work. Fabricated in a 110-nm CMOS process, the prototype AFE consumes 3.83 $\mu \text{W}$ per channel at 1 and 1.5-V supplies and has the input-referred noise of 0.36 $\mu \text{V}_{rms}$ from 0.5 to 300 Hz with the noise efficiency factor of 1.54. The proposed AFE achieves high-input impedances of 15 $\text{G}\Omega $ at 10 Hz and 2 $\text{G}\Omega $ at 50 Hz, even with an additional $C_{P-EXT}$ of 82 pF.

This article presents a 320 x 240 indirect time-of-flight (iToF) CMOS image sensor (CIS) with on-chip motion artifact suppression and background light cancelling (BGLC). The proposed iToF CIS uses a backside-illuminated trident pinned photodiode (PPD) that assists charge transfer with a built-in lateral electric field for enhanced depth accuracy. To overcome the limitation of the conventional iToF CIS that exhibits motion artifact, we propose a pseudo-four-tap (P4-tap) demodulation method with alternate phase driving using a conventional two-tap pixel structure with a high fill factor of over 43%. In addition, by combining the advantages of both the P4-tap and conventional two-tap demodulation schemes, we propose hybrid depth imaging with reduced motion artifact for moving objects, while providing high-depth precision for the static background. For outdoor mobile applications of the iToF CIS, we integrated on-chip BGLC circuits to eliminate the BGL-induced depth error. A prototype chip is fabricated using a 90-nm backside illumination (BSI) CIS process. The BSI trident PPD enabled a low depth error of under 0.54% over the range of 0.75-4 m, with a modulation frequency of 100 MHz. Motion artifact was suppressed at 60 frames/s of hybrid depth imaging owing to the proposed P4-tap scheme. With the on-chip BGLC circuit, the experimental results demonstrate a 0.55% depth error at a 1-m distance, even under 120-klx BGL illumination.

We present a fully implantable neural recording IC with a spike-driven data compression scheme to improve the power efficiency and preserve crucial data for monitoring brain activities. A difference between two consecutive neural signals, Δ-neural signal, is sampled in each channel to reduce the full dynamic range and the required resolution of an analog-to-digital converter (ADC), enabling the whole analog chain to be operated at a 0.5-V supply. A set of multiple Δ-signals are stored in analog memory to extract the magnitude and frequency features of the incoming neural signals, which are utilized to discriminate spikes in these signals instantaneously after the acquisition in the analog domain. The energy- and area-efficient successive approximation ADC is implemented and only converts detected spikes, decreasing the power dissipation and the amount of neural data. A prototype 16-channel neural interface IC was fabricated using a 0.18-μm CMOS process, and each component in the analog front-end was fully characterized. We successfully demonstrated precise spike detection through both in vitro and in vivo acquisition of the neural signal. The prototype chip consumed 0.88 μW/channel at a 0.5-V supply for the recording and compressed about 89% of neural data, saving the power consumption and bandwidth in the system.

This paper proposes a 32.7 kHz self-biased wake-up timer using temperature-insensitive resistive current. A dual-loop structure with supply-regulation loop and frequency-locked loop determines the regulated voltages at both ends of a temperature-compensated resistor and cancels out the amplifier offset voltages, thus generating temperature-insensitive resistive current for the switched capacitor. Moreover, a self-biasing scheme in low-power design reduces the power variation across the temperature range and eliminates the necessity of a sub-μA reference current generator. The proposed timer with its start-up circuit generates <12 ms lock time, which is 20 times less than what obtained without a start-up circuit, and exhibits a long-term frequency stability of 10 ppm and a temperature coefficient of 13.2 ppm/°C with an energy efficiency of 1.08 nW/kHz.