In this work, GaN HEMTs on 6-inch sapphire substrates are successfully demonstrated for potential 1700 V power applications. The 1.5 μm GaN buffer features a well-controlled crystal quality and uniformity. Benefiting from the insulating sapphire substrate, the buffer vertical leakage channel is cut off, and the lateral parasitic channel at the epitaxy/substrate interface is also significantly suppressed. The fabricated d-mode HEMTs with L _GD of 30 μm highlight a high blocking voltage over 3000 V and a low ON-resistance of 17 Ω·mm. The thin-buffer GaN-on-sapphire technology can significantly reduce the epitaxy and processing difficulties, reduce cost, and enable GaN as a strong competitor for 1700 V and even higher-level power applications.

Traditional GaN HEMTs on silicon suffer relatively low lateral and vertical blocking voltages and thick buffers, which impede their use in $\boldsymbol {\ge }1.2$ -kV applications. In this work, the prototypes of 8-kV GaN HEMTs on 6-in sapphire are successfully fabricated using CMOS-compatible processing. An etch-stop nitride layer AlN in the in situ SiN cap precisely defines the gate dielectric thickness. Au-free low-temperature ohmic contact and metal I are achieved by Ti/AlCu/Ti/TiN, and gate metal is achieved by TiN/Ti/AlCu/Ti/TiN, which significantly reduces the material cost. The high mechanical strength of sapphire results in low nonuniformity and well-controlled warpage, enabling the use of a 1.5- $\boldsymbol {\mu }$ m buffer. The fabricated HEMTs with an ${L}_{\text {GD}}$ of $100~\boldsymbol {\mu }$ m exhibit a low ${R}_{\text {ON}}$ of $52~\boldsymbol {\Omega } \cdot $ mm and a stable ${V}_{\text {TH}}$ of −20 V. Benefiting from high-quality in situ SiN passivation, the dynamic ${R}_{\text {ON}}$ and ${V}_{\text {TH}}$ shift are maintained within 2.5% and 10%, respectively. The OFF-state breakdown voltage (BV) is increased beyond 8 kV using a simple device structure with only two field plates. The proposed low-cost and CMOS-compatible 8-kV GaN HEMTs fabricated on 6-in sapphire highlight an extremely simple epitaxy process, lateral device structure, and processing flow. Therefore, they offer great potential for serving future medium-voltage applications.

The ≥ 650 V power electronics market penetration by GaN HEMTs on Si has been impeded by the GaN buffer. Recently, GaN-on-sapphire, a promising solution, attracts great attentions. In this work, p-GaN gate HEMTs are successfully manufactured on 6-inch sapphire by CMOS-compatible process in our pilot line. Device process modules of p-GaN selective etching, low-temperature Ohmic contact, and Al2O3/SiO2 passivation have all be realized. The fabricated $16~\mu $ m– ${L}_{\text {GD}}$ devices with a simplified epitaxy and device structure, feature a low ${R}_{\text {ON}}$ of $14.8~\Omega \cdot $ mm, a high ${V}_{\text {TH}}$ of 2 V, and a high OFF-state breakdown voltage (BV) over 1360 V. Further, the nonuniformity of the ${R}_{\text {ON}}$ and ${V}_{\text {TH}}$ across the 6-inch whole wafer is well controlled. Devices also passed the preliminary reliability assessment of high temperature gate bias (HTGB) stress and high temperature reverse bias (HTRB) stress. The high-reliability, high-uniformity, and low-cost p-GaN gate HEMTs on 6-inch sapphire will probably be a strong driven force for the power electronics market in the near future.

The two crucial factors of large scale and high voltage can hardly be balanced for the traditional GaN HEMTs on Si substrates. Recently, one promising solution, GaN-on-sapphire, has attracted great attention. However, the commercialized GaN-on-sapphire wafers ever reported are usually 6 in. It is urgent to develop 8-in GaN-on-sapphire to reduce the cost and meet the market demands. In this work, to the best of our knowledge, an 8-in GaN-on-sapphire wafer is demonstrated for the first time. The sheet resistance $\textit{R}_{{\Box}} $ exhibits a wafer-level nonuniformity of 4% and an average value of 310 $\bm\Omega/\Box$ , and the warpage is kept to 30 $\mu $ m, by dedicatedly tuning the 1.98- $\mu $ m buffer stack. The fabricated 200-V HEMTs exhibit a low $\textit{R}_{\biosc{on}}$ of 6.5 $\bm\Omega \cdot\text{mm}$ , a $\textit{V}_{\text{TH}}$ of $-$ 4.2 V, and an OFF-state breakdown voltage above 500 V without any field plate. The electrical mapping visualizes $\textit{R}_{\biosc{on}}$ and $\textit{V}_{\text{TH}}$ distributed in concentric circles across the wafer. Generally, this work demonstrates the feasibility of realizing 8-in GaN-on-sapphire for power electronics applications in the future.

GaN-on-sapphire has recently attracted great attention for power electronics. Although plenty of efforts have already been made in this topic decades ago, but thorough evaluation on the buffer for $\ge$ 1200-V devices are, however, lacking. In this work, two promising buffers, i.e., AlGaN buffer and carbon-doped GaN buffer (C:GaN), are compared. The key results demonstrate that by replacing the AlGaN buffer with C:GaN buffer, the full-widths at half-maximums (FWHMs) of $\omega$ -rocking curves for (002) and (102) planes reduce from 785 and 2421 to 488 and 1240 arcsec, respectively, and the average sheet resistance $\textit{R}_{\Box}$ drops from 501 to 342 $\Omega$ / $\Box$ and its nonuniformity improves from 4.6% to 1.9%. The fabricated high-electron-mobility transistors (HEMTs) exhibit an optimized $\textit{R}_{{\text{ON}}}$ from 22.1 to 16.1 $\Omega \cdot$ mm, a more uniform off-state blocking capability, and an improved dynamic $\textit{R}_{{\text{ON}}}$ degradation from 104% to 50.4%. Capacitance and conductance analysis discovered that an extra group of deep traps is introduced by the AlGaN buffer. Further photoluminescence (PL) spectroscopy unveils a stronger yellow luminescence (YL), corresponding to a higher density of radiation-related defect recombination centers induced by the AlGaN buffer. Overall, this work unambiguously shows the carbon dopants, often used in GaN-on-Si epitaxy, can help to facilitate the commercialization of $\ge$ 1200-V HEMTs on sapphire in the future.

Single-crystalline AlN templates are a promising substrate choice for GaN power HEMTs, which have, however, seldom been investigated. In this work, high-performance GaN HEMTs on 2-in AlN templates are successfully demonstrated and evaluated. The buffer lateral leakage was significantly suppressed by five orders of magnitude by epitaxially growing an AlN nucleation layer to deactivate the impurities of Si and O, which are introduced at the interface of buffer/AlN template during the secondary epitaxy. An exceptionally high lateral blocking voltage exceeding 10 kV was attained with a spacing of $100~\mu $ m. HEMTs without any field plate structure showcase an outstanding breakdown voltage of over 8 kV and an on/off ratio of $10^{{9}}$ . The dynamic $R_{\text{on}}$ degradation is limited to be within 20%, and the threshold voltage ${V}_{\text {th}}$ exhibits a 10% shift after off-state stress. High-performance GaN HEMTs demonstrated in this work prove that the single-crystalline AlN templates are promising for future high-reliability power HEMTs.