A novel non-isolated DC-DC converter is proposed by combining quadratic boost converter with voltage multiplier cell. The proposed converter has low semiconductor device voltage stress and switch utilization factor is high. The superiority of the converter is voltage stress of the semiconductor devices depends on voltage multiplier (VM) cell. By increasing the VM cell the stresses across the devices reduce drastically. The proposed converter has same number of components compared to certain voltage lift converters taken for comparison. A detailed comparative study is made on the proposed converter with few voltage lift converters in the literature, conventional boost with VM cell and quadratic boost converter. A 40W prototype is constructed with 12V input voltage and 96V output voltage to verify the performance and validate the theoretical analysis of the proposed converter

The vigorous growth of electric vehicles in the field of automobile paves the way for the development of dc-dc converter. A novel high gain super Luo dc-dc converter is proposed in this article. A modification is suggested in the topology when the converters are cascaded for high gain. This suggested modification can be applied to any topology for reliable capacitor. The presented converter adds boosting (voltage multiplier) cell before the load to expand the voltage conversion ratio. This converter renders remarkable features like extended voltage gain, low voltage stress on power switches, minimal capacitor stress and less component count. The operating principle and steady-state analysis of the proposed topology is presented. The main feature of the proposed topology is reduced capacitor stress which is evaluated by reliability study with military handbook MIL-HDBK-217F. The significance of minimal capacitor stress with the failure of the capacitor is elaborated. Simulation on the derived topology is carried out with Matlab/Simulink and it validates the theoretical results. Furthermore, the proposed topology is extended with dual output which makes the restructured converter suitable for Electric vehicle application and the simulation of the dual output topology is performed and studied. The experimental results obtained from the 50 W prototype validate the complete steady-state analysis performed on the proposed topology.

Multi-port converters have fewer components count and less conversion stage than the traditional power processing solution which adopts several independent two-port converters. This paper emphasis on the use of a single power processing stage to interface multiple power inputs integrates power conversion for a hybrid power source. The classification of various multiport dc-dc converters topologies both isolated and non isolated are studied and the features are listed.

This paper presents a generalized restructured topology for boost, buck-boost and its derived dc/dc converters with rearranging branches to enhance the reliability of the converter. This paper instigates the derivation of state-of-the-art topologies with reduced capacitor voltage stress. Mainly in the restructured topology, the capacitor branch is rearranged in the converter and this redesign venture results in profuse advantages like a better choice of the capacitor with low voltage rating, low equivalent series resistance and reduced voltage stress of the converter. The investigation of the capacitor voltage stress and reliability test is carried out. No extra components are required in this method, the same component count as the conventional converter is maintained. In comparison with the conventional converters, the restructured topology shows the identical output voltage with decreased capacitor voltage stress. Besides reduced voltage stress, the capacitor losses are also less and this allows the capacitor to perform better. As a consequence, the efficiency and lifetime are improved and extended. A detailed illustration of the significance of this restructured concept is presented with a validating analysis. Experimental results from a 600 W prototype are presented with different duty cycles for validating and highlighting the special features of the restructured topology.

Globally, the demand for energy from renewable sources is growing due to the increasing electricity consumption and the pollution of fossil fuels. The government has framed various policies to facilitate green energy generation, encouraging renewable energy source usage through PV installations in multiple sectors, including educational institutions. The primary objective of this paper is to propose a methodological approach for analysing the performance of the installed PV system on the rooftop of a university building in Tamil Nadu, India. The site selected is favourable for electricity generation from PV systems with an average global solar radiation of 5.82 kWh/m²day. Solar energy changes periodically with annual and daily variations and is not steady due to seasonal changes. The step-by-step performance assessment and the annual performance of the 100-kW solar PV system, which was instituted in 2019, with the forecasted parameters, are presented in this paper. Therefore, the assessment analysis is carried out in four phases: feasibility assessment, Energy yield assessment, Life cycle assessment, and Power quality assessment. To improve the solar PV output and efficiency, considering the solar irradiation, temperature, wind velocity, etc., PV yield is measured to evaluate the PV system's energy metrics. This paper also considers the carbon credits earned, solar power generated in the location, and the payback period. The power quality assessment is carried out in this paper to test the PV plant's compliance with effective grid integration.