Exceptional advancement has been made in the development of graphene optical nanoantennas. They are incorporated with optoelectronic devices for plasmonics application and have been an active research area across the globe. The interest in graphene plasmonic devices is driven by the different applications they have empowered, such as ultrafast nanodevices, photodetection, energy harvesting, biosensing, biomedical imaging and high-speed terahertz communications. In this article, the aim is to provide a detailed review of the essential explanation behind graphene nanoantennas experimental proofs for the developments of graphene-based plasmonics antennas, achieving enhanced light–matter interaction by exploiting graphene material conductivity and optical properties. First, the fundamental graphene nanoantennas and their tunable resonant behavior over THz frequencies are summarized. Furthermore, incorporating graphene–metal hybrid antennas with optoelectronic devices can prompt the acknowledgment of multi-platforms for photonics. More interestingly, various technical methods are critically studied for frequency tuning and active modulation of optical characteristics, through in situ modulations by applying an external electric field. Second, the various methods for radiation beam scanning and beam reconfigurability are discussed through reflectarray and leaky-wave graphene antennas. In particular, numerous graphene antenna photodetectors and graphene rectennas for energy harvesting are studied by giving a critical evaluation of antenna performances, enhanced photodetection, energy conversion efficiency and the significant problems that remain to be addressed. Finally, the potential developments in the synthesis of graphene material and technological methods involved in the fabrication of graphene–metal nanoantennas are discussed.

The capability of multiple valued logic (MVL) circuits to achieve higher storage density when compared to that of existing binary circuits is highly impressive. Recently, MVL circuits have attracted significant attention for the design of digital systems. Carbon nanotube field effect transistors (CNTFETs) have shown great promise for design of MVL based circuits, due to the fact that the scalable threshold voltage of CNTFETs can be utilized easily for the multiple voltage designs. In addition, resistive random access memory (RRAM) is also a feasible option for the design of MVL circuits, owing to its multilevel cell capability that enables the storage of multiple resistance states within a single cell. In this manuscript, a design approach for ternary combinational logic circuits while using CNTFETs and RRAM is presented. The designs of ternary half adder, ternary half subtractor, ternary full adder, and ternary full subtractor are evaluated while using Synopsis HSPICE simulation software with standard 32 nm CNTFET technology under different operating conditions, including different supply voltages, output load variation, and different operating temperatures. Finally, the proposed designs are compared with the state-of-the-art ternary designs. Based on the obtained simulation results, the proposed designs show a significant reduction in the transistor count, decreased cell area, and lower power consumption. In addition, due to the participation of RRAM, the proposed designs have advantages in terms of non-volatility.

Numerous works that have demonstrated the study and enhancement of switching properties of ZnO-based RRAM devices are discussed. Several native point defects that have a direct or indirect effect on ZnO are discussed. The use of doping elements, multi-layered structures, suitable bottom and top electrodes, controlling the deposition materials, and the impact of hybrid structure for enhancing the switching dynamics are discussed. The potentials of ZnO-based RRAM for invisible and bendable devices are also covered. ZnO-based RRAM has the potential for possible application in bio-inspired cognitive computational systems. Thus, the synapse capability of ZnO is presented. The sneak-path current issue also besets ZnO-based RRAM crossbar array architecture. Hence, various attempts to subdue the bottleneck have been shown and discussed in this article. Interestingly, ZnO provides not only helpful memory features. However, it demonstrates the ability to be used in nonvolatile multifunctional memory devices. Also, this review covers various issues like the effect of electrodes, interfacial layers, proper switching layers, appropriate fabrication techniques, and proper annealing settings. These may offer a valuable understanding of the study and development of ZnO-based RRAM and should be an avenue for overcoming RRAM challenges.

Due to the difficulties associated with scaling of silicon transistors, various technologies beyond binary logic processing are actively being investigated. Ternary logic circuit implementation with carbon nanotube field effect transistors (CNTFETs) and resistive random access memory (RRAM) integration is considered as a possible technology option. CNTFETs are currently being preferred for implementing ternary circuits due to their desirable multiple threshold voltage and geometry-dependent properties, whereas the RRAM is used due to its multilevel cell capability which enables storage of multiple resistance states within a single cell. This article presents the 2-trit arithmetic logic unit (ALU) design using CNTFETs and RRAM as the design elements. The proposed ALU incorporates a transmission gate block, a function select block, and various ternary function processing modules. The ALU design optimization is achieved by introducing a controlled ternary adder–subtractor module instead of separate adder and subtractor circuits. The simulations are analyzed and validated using Synopsis HSPICE simulation software with standard 32 nm CNTFET technology under different operating conditions (supply voltages) to test the robustness of the designs. The simulation results indicate that the proposed CNTFET-RRAM integration enables the compact circuit realization with good robustness. Moreover, due to the addition of RRAM as circuit element, the proposed ALU has the advantage of non-volatility.

Resistive random access memory (RRAM) has two distinct processes, the SET and RESET processes, that control the formation and dissolution of conductive filament, respectively. The laws of thermodynamics state that these processes correspond to the lowest possible level of free energy. In an RRAM device, a high operating voltage causes device degradation, such as bends, cracks, or bubble-like patterns. In this work, we developed a statistical simulation of the switching mechanism in a ZnO-based RRAM. The model used field-driven ion migration and temperature effects to design a ZnO-based RRAM dynamic SET and RESET resistance transition process. We observed that heat transport within the conducting filament generated a great deal of heat energy due to the carrier transport of the constituent dielectric material. The model was implemented using the built-in COMSOL Multiphysics software to address heat transfer, electrostatic, and yield RRAM energy. The heat energy increased with the increase in the operating power. Hence, the reliability of a device with high power consumption cannot be assured. We obtained various carrier heat analyses in 2D images and concluded that developing RRAM devices with low operating currents through material and structure optimization is crucial.