Seok-Min Kim

Mr. Seok-Min Kim


Research Focus & Metrics

Academic Career Length

9Years (2018-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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31 January 2019 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
SLSze Sing Lee
Sze Sing Lee
Yeongsu BakYeongsu Bak
Yeongsu Bak
SKSeok-Min Kim
Seok-Min Kim
AJAnto Joseph
Anto Joseph
Kyo-Beum LeeKyo-Beum Lee
Kyo-Beum Lee
This paper proposes a new family of multilevel inverter topology that is able to generate seven voltage levels by utilizing one or two floating capacitors and ten power switches. This novel boost switched-capacitor 7-level inverter (BSC7LI) possesses voltage boosting capability with an achievable maximum voltage level 1.5 times the input direct current (dc) voltage. The generation of higher output voltage does not incur high-voltage stress on any power switch in this topology, as the peak inverse voltages of all power switches do not exceed the input source voltage. In addition, capacitor voltage balancing is not essential since the floating capacitors are effectively balanced during the charging and discharging processes. Furthermore, the proposed topology eliminates the need for multiple isolated dc sources, and a single dc source is sufficient in both its single-phase and three-phase topologies. The operating principle and steady-state analysis of the proposed topology are elaborated. Experimental results from a single-phase prototype are then presented to verify the validity of the proposed topology.

29 September 2020 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
YKYe-Ji Kim
Ye-Ji Kim
SKSeok-Min Kim
Seok-Min Kim
Kyo-Beum LeeKyo-Beum Lee
Kyo-Beum Lee
This paper presents a DC-link capacitor lifetime improvement method for three-level photovoltaic (PV) hybrid active neutral-point clamped (ANPC) inverters in full modulation index range. The capacitors are one of the components with vulnerable reliability in a power conversion system. The DC-link capacitor current ripples lead to temperature rise and wear-out failure of the capacitors. The accumulated thermo-mechanical damages from the temperature rise reduce the capacitor lifetime and reliability of the system. The proposed modulation method suppresses effectively the DC-link capacitor current ripple to improve the capacitor lifetime. In this paper, the proposed method is discussed via a comparison with conventional space-vector pulse width modulation (SVM) in full modulation index range. The modulation index range is divided into two regions, namely medium-vector modulation and hybrid modulation region. The capacitor lifetime is evaluated by the capacitor lifetime model according to the modulation methods and modulation regions. The effectiveness of the proposed modulation method is verified through simulation and experimental results.

5 April 2018 in IEEE Transactions on Industrial Electronics
Verified
Journal Article
Closed access
SKSeok-Min Kim
Seok-Min Kim
IWIn Jung Won
In Jung Won
JKJuyong Kim
Juyong Kim
Kyo-Beum LeeKyo-Beum Lee
Kyo-Beum Lee
This paper presents an optimized switching strategy to reduce the dc-link ripple current for three-level photovoltaic (PV) inverters. The large electrolytic capacitors are commonly used for the dc link of power electronics applications to stabilize the dc-link voltage. The most important factor of designing the dc-link capacitor is the allowable current ripple. The over-ripple current flowing through the capacitor causes a high heat loss, shortened lifespan, low stability, and reliability. The proposed switching scheme selects voltage vectors and reconfigures dwelling order of the vectors to reduce the capacitor ripple current. This switching method is able to extend the lifetime of the dc-link capacitors by simple software programming. In addition, this switching method reduces the common-mode voltage and leakage current that represent high reliability and safety of the system. The effectiveness of the proposed method is verified with simulations and experimental results.

18 June 2018 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
SKSeok-Min Kim
Seok-Min Kim
MJMin-Gyo Jeong
Min-Gyo Jeong
JKJuyong Kim
Juyong Kim
Kyo-Beum LeeKyo-Beum Lee
Kyo-Beum Lee
A modular multilevel converter (MMC) is regarded as a promising topology in high-voltage direct current (HVDC) systems. However, the MMC consists of numerous sub-modules (SMs) and switching devices, which lead to a considerable switching loss, and increased cost and size of the heat sink. To mitigate these issues, this paper presents a novel modulation method composed of fundamental frequency modulation (FFM) and multi-carrier-based sinusoidal pulse-width modulation (MSPWM) schemes. The main purpose of this modulation method is the reduction of switching loss while maintaining good harmonic performance. However, the FFM scheme leads to an unbalancing problem of each SM in the MMC. Accordingly, this paper additionally proposes the rotation method and selective voltage balancing control for SMs to ensure effective performance of the method. Simulation and experimental results verify the effectiveness and performance of the proposed modulation scheme through switching loss and spectral analyses.

1 January 2020 in IEEE Access
Verified
Journal Article
Open access
SKSeok-Min Kim
Seok-Min Kim
ELEui-Jae Lee
Eui-Jae Lee
June-Seok LeeJune-Seok Lee
June-Seok Lee
Kyo-Beum LeeKyo-Beum Lee
Kyo-Beum Lee
This paper proposes an improved discontinuous pulse-width modulation (DPWM) method based on phase-shifted PWM (PS-PWM) for three-phase cascaded H-bridge (CHB) multilevel inverters. Due to the CHB multilevel inverters employ a large number of power semiconductor switches, they suffer from device failures because the switches are one of the major failure factors in a power electronic system. Therefore, the reliability and life-time of CHB multilevel inverters are mainly determined by the reliability of switches. The most failure of switches is occurred by its accumulated thermal stress which is generated by power losses including the conduction and switching loss. By applying the conventional DPWM, the life-time of switches can be extended because it reduces the switching loss. The conventional DPWM, however, still operates with high speed carrier frequency and it is not enough to reduce the switching loss of the CHB multilevel inverter with a large number of inverter cells. The proposed novel DPWM method provides the improved switching loss reduction through the different switching behaviors for each leg. Additionally, the rotation scheme promises even power distribution and life-time management among inverter cells in a CHB multilevel inverter. The simulation results and experimental results confirm the switching loss reduction and even power distribution abilities of the proposed modulation method.

28 February 2020 in Electronics
Verified
Journal Article
Open access
PDF file
BKBong Hyun Kwon
Bong Hyun Kwon
SKSang-Hun Kim
Sang-Hun Kim
SKSeok-Min Kim
Seok-Min Kim
Kyo-Beum LeeKyo-Beum Lee
Kyo-Beum Lee
A diagnostic method for an open-circuit switch failure in a hybrid active neutral-point clamped (HANPC) inverter is proposed in this paper. The switching leg of the HANPC inverter consists of four silicon insulated gate bipolar transistors and two silicon carbide metal-oxide-semiconductor field-effect transistors to achieve higher efficiency and power density compared to conventional neutral-point clamped inverters. When an open-circuit failure occurs in a switching device, the output current is severely distorted, causing damage to the inverter and the connected loads. The proposed diagnostic method aims to detect the open-switch failure and protect the related devices without additional sensors or circuits. The faulty conditions of six different switches are investigated based on the current distortion in the stationary reference frame. By analyzing the individual characteristic of each switch failure, it is possible to detect the exact location of the failed switch in a short period. The effectiveness and feasibility of the proposed fault-diagnostic method are verified using simulation and experimental results.