In 2008, Salahuddin and Datta proposed that a ferroelectric material operating in the negative capacitance (NC) region could act as a step-up converter of the surface potential in a metal-oxide-semiconductor structure, opening a new route for the realization of transistors with steeper subthreshold characteristics (S <; 60mV/dec). In this paper, a comprehensive physics-based surface potential and a drain current model for the NC field-effect transistor are reported. The model is aimed to evaluate the potentiality of such transistors for low-power switching applications. This paper also sheds light on how operation in the NC region can be experimentally detected.
Graphene / silicon (G/Si) heterostructures have been studied extensively in the past years for applications as photodiodes, photodetectors and solar cells, with a growing focus on efficiency and performance. Here, a specific contact pattern scheme with interdigitated Schottky and graphene/insulator/silicon (GIS) structures is explored to experimentally demonstrate highly sensitive G/Si photodiodes. With the proposed design, an external quantum efficiency (EQE) of > 80% is achieved for wavelengths ranging from 380 to 930 nm. A maximum EQE of 98% is observed at 850 nm, where the responsivity peaks to 635 mA/W, surpassing conventional Si p-n photodiodes. This efficiency is attributed to the highly effective collection of charge carriers photogenerated in Si under the GIS parts of the diodes. The experimental data is supported by numerical simulations of the diodes. Based on these results, a definition for the ‘true’ active area in G/Si photodiodes is proposed, which may serve towards standardization of G/Si based optoelectronic devices.
Graphene/silicon (G/Si) heterojunction based devices have been demonstrated as high responsivity photodetectors that are potentially compatible with semiconductor technology. Such G/Si Schottky junction diodes are typically in parallel with gated G/silicon dioxide (SiO2)/Si areas, where the graphene is contacted. Here, we utilize scanning photocurrent measurements to investigate the spatial distribution and explain the physical origin of photocurrent generation in these devices. We observe distinctly higher photocurrents underneath the isolating region of graphene on SiO2 adjacent to the Schottky junction of G/Si. A certain threshold voltage (VT) is required before this can be observed, and its origins are similar to that of the threshold voltage in metal oxide semiconductor field effect transistors. A physical model serves to explain the large photocurrents underneath SiO2 by the formation of an inversion layer in Si. Our findings contribute to a basic understanding of graphene/semiconductor hybrid devices which, in turn, can help in designing efficient optoelectronic devices and systems based on such 2D/3D heterojunctions.
This work presents a detailed study of the photothermal ablation of Kapton® polyimide by a laser diode targeting its electrical conductivity enhancement. Laser-treated samples were structurally characterized using Scanning Electron Microscopy (SEM), Raman spectroscopy, X-ray Photoelectron Spectroscopy (XPS), as well as Diffuse Reflectance Infrared Fourier Transform (DRIFT) spectroscopy. The results show that the laser-assisted ablation constitutes a simple one-step and environmental friendly method to induce graphene-derived structures on the surface of polyimide films. The laser-modified surface was also electrically characterized through the Transmission Line Method (TLM) aiming at the improvement of the conductivity of the samples by tuning the laser power and the extraction of the contact resistance of the electrodes. Once the laser-ablation process is optimized, the samples increase their conductivity up to six orders of magnitude, being comparable to that of graphene obtained by chemical vapor deposition or by the reduction of graphene-oxide. Additionally, we show that the contact resistance can be decreased down to promising values of ∼2 when using silver-based electrodes.
We demonstrate the confinement of acoustic phonons in ultrathin silicon layers and study its effect on electron mobility. We develop a model for confined acoustic phonons in an ideal single-layer structure and in a more realistic three-layer structure. Phonon quantization is recovered, and the dispersion relations for distinct phonon modes are computed. This allows us to obtain the confined phonon scattering rates and, using Monte Carlo simulations, to compute the electron mobility in ultrathin silicon on insulator inversion layers. Thus, comparing the results with those obtained using the bulk phonon model, we are able to conclude that it is very important to include confined acoustic phonon models in the electron transport simulations of ultrathin devices, if we want to reproduce the actual behavior of electron transport in silicon layers of nanometric thickness.
27 November 2007 in IEEE Transactions on Electron Devices
In this paper, simulation-based research on the electrostatics of Pi-gate silicon-on-insulator (SOI) MOSFETs is carried out. To do so, a 2-D self-consistent Schrodinger-Poisson solver has been implemented. The inclusion of the quantum effects has been demonstrated to be necessary for the accurate simulation of these devices in the nanometer range. Specifically, this paper is focused on the corner effects in multiple-gate SOI MOSFETs, defined as the formation of independent channels with different threshold voltages. Corner effects are studied as a function of different parameters, such as the doping density, silicon-fin dimensions, corner rounding, and gate oxide thickness. Finally, the relation between corner effects and the transition from a fully to a partially depleted body is analyzed.