Online junction temperature monitoring of power devices is a viable technique to ensure the reliable operation of mission-critical power electronic converters. This paper provides a potential approach for junction temperature estimation of SiC MOSFETs based on the dynamic threshold voltage. The proposed method is independent of load current variation, which eliminates the complicated calibration procedure with the load current. First, the physical mechanism and the temperature dependence of dynamic threshold voltage are analyzed. An analytical model for the dynamic threshold voltage is built to investigate the effects of gate loop parameters on the temperature sensitivity and measurement accuracy. Then, the principle of dynamic threshold voltage measurement circuit is introduced. Finally, the proposed dynamic threshold voltage measurement circuit is experimentally evaluated through the double pulse tests. Experimental results show that the dynamic threshold voltage of SiC MOSFET has a good linear relationship with junction temperature. The temperature sensitivity of dynamic threshold voltage of two SiC MOSFETs is approximately 5.2mV/°C and 19.6 mV/°C, respectively.

We demonstrate the transient parity-time (PT) symmetry in electronics. It is revealed by equivalent circuit transformation according to the switching states of electronic systems. With the phasor method and Laplace transformation, we derive the hidden PT-symmetric Hamiltonian in the switching oscillation, which are characterized by free oscillation modes. Both spectral and dynamic properties of the PT electronic structure demonstrate the phase transition with eigenmode orthogonality. Importantly, the observed transient PT symmetry enables exceptional-point-induced optimal switching oscillation suppression, which shows the significance of PT symmetry in electronic systems with temporary responses. Our work paves the way for breakthroughs in the PT symmetry theory and has essential applications such as anti-interference in switch-mode electronics.

In pursuit of high power density and high reliability of power converters, the junction temperature of power devices becomes an essential indicator for heath condition monitoring and thermal management. Particularly under high-temperature operating conditions, the temperature-dependent thermal properties of the chip and ceramic materials must be incorporated to enhance the prediction accuracy. In this article, an improved temperature-dependent Cauer-type thermal network of insulated-gate bipolar transistor (IGBT) module is established. The temperature dependence of thermal parameters for the chip layer and ceramic layer is meticulously considered. More importantly, finite-element method (FEM) simulation is used to yield the heat flux curve of the power module at the center line in order to better imitate the real heat-spreading scenario. In this way, the effective heat transfer area of each layer can be calculated accurately and analytically. By this analytic method, the temperature-dependent thermal impedance can be efficiently determined. Compared with prior-art fully FEM-based temperature-dependent thermal impedance characterization method, the method proposed in this article reduces the FEM simulation time cost approximately 20 times under the same computing hardware facilities and considerably simplifies the parameter extraction process. Finally, experimental results based on two commercial IGBT modules successfully validate the usefulness, effectiveness, and accuracy of the proposed thermal network model.

The optimal gate delay time control between the two internal devices to achieve the excellent electrical and thermal performance of the Si/SiC hybrid switch is considerably affected by several factors and requires careful adjustment to suit the different operation conditions of power converters. However, the conventional gate control solution for the hybrid switch applies a fixed delay time to achieve the minimum switching loss at a specific load current, resulting in disparities in junction temperature of internal devices over a wide load range. This effectively reduced the safe operating area by risking one internal switch subjected to overrated junction temperature in a wide range operation with regard to power handling condition. To avoid such a serious risk of reliability degradation or thermal breakdown, a novel active gate delay time control strategy based on the electro-thermal coupling loss model is proposed. The gate delay time was dynamically adjusted and optimized according to the operation conditions of power converters so that the operation junction temperature difference of the two internal devices can be minimized. Experimental results demonstrate that the junction temperature of the hybrid switch decreases by 20°C at 8kW load condition and its maximum power handling capability increases by 18% without compromising the power converter's efficiency in a 20 kHz Si/SiC hybrid switch based DC/DC buck converter compared with the conventional approach.

The switching oscillations caused by the high-speed switching and low-damping characteristics of SiC mosfet seriously deteriorate its high-reliability applications. By viewing from the terminals of both SiC mosfet and diode for the turn- on and turn- off oscillation not only the two-port networks be formed to carry out more accurate analysis about the system characteristics but also the characteristic equations of the system can be deduced, thereby reliably guiding the RC snubber design. Since the oscillation is essentially caused by the imaginary part of poles, with the assistance of the two-port networks, an optimized design method of an RC snubber circuit is developed by the way of actively assigning poles. Different from existing analytical techniques, no necessity is needed to reduce the order of characteristic equations to yield the mathematical expressions of RC snubbers. Instead, RC snubber regions where oscillations can be completely suppressed are determined directly by an exhaustion method. An overlapping area is found, which means that both the turn- on and turn- off oscillation can be eliminated simultaneously by the same snubber circuit. Moreover, the related discussions about existence conditions of the snubber region, sensitivity to parameters, and the limitation in choosing RC are illustrated in detail. Finally, standard double-pulse tests are conducted on both the LTspice simulation and the laboratory experiment to verify the effectiveness of the analysis and proposed method.

Electromagnetic suspension (EMS) is an important type of maglev train systems. With commercial success in the low-speed maglev train, developing a medium-speed maglev type with a top speed of 200 km/h based on the current low-speed maglev technology has been attracting great research interest and engineering effort. This new maglev system will nicely meet the requirement of inter-city transportation. However, at a higher speed, the eddy current effect in the EMS system of the leading end of a maglev train becomes an unnegligible factor, as the induced eddy current in the non-laminated steel rails will tremendously reduce the levitation force. This paper comprehensively investigates the mechanism of eddy current effect in the EMS system and uses a 3-D finite-element method to fully analyze the impacts of eddy current on levitation force adopting an accurate simulation model. Compared with the experimental data, the simulation results show good agreement. With this accurate simulation model, an optimized design of an electromagnetic levitation system is proposed as well as its corresponding control scheme. The proposed design at 200 km/h effectively mitigates the eddy current effect while still maintaining the required levitation force at the leading end of maglev train.