Analysis of the substrate coupling in integrated circuits is done taking into account technology and layout parameters for different types and location of transistors using a device-level simulator. The noise coupling tendencies of IC scaling are analysed, following interest in advanced technologies. The potential for permanent errors is shown in the case of a RAM cell. A circuit-level model for the coupling mechanism is proposed. The implementation of an IC for experimentation, and the measurements obtained, are discussedPeer ReviewedPostprint (published version

An extensive experimental analysis of the hot carrier injection (HCI) and bias temperature instability (BTI) aging effects on RF linear power amplifiers (PAs) is presented in this article. Two different 2.45-GHz PA topologies have been implemented in a CMOS 65-nm technology: one based on a classical common-source (CS) and choke inductor and another one based on a complementary current-reuse (CR) circuit, both of them producing similar gain and output 1-dB compression point (P-1,dB). These circuits have been stressed to produce accelerated aging degradation, by applying increasing supply (VDD) voltages or increasing RF input powers (PIN). The degradation on the transistor parameters (threshold voltage and mobility), dc bias point (Idc current), and RF performance (gain, matching, and compression point) has been simultaneously measured. This has allowed us to observe how the reduced transistor degradation in CR PA results in higher robustness in its RF parameters compared with the CS PA circuit. The equivalent root-mean-square (rms) voltages have been proposed as an observable metric to assess the combined dc + RF stress in a PA circuit. This has been applied to a semianalytical model, providing comprehension of the link between the conditions under which a circuit is operated, the degradation of the transistor parameters, and the effects on the dc current and RF performance.

The present work addresses the investigation of phase noise degradation of LC-tank VCOs due to realistic digitally originated substrate noise. The dominant mechanisms by which this noise is coupled to the output of the oscillator due to the substrate and the package are analyzed, indicating that both noise at low frequencies and at high frequencies around the oscillation fundamental significantly degrade phase noise.

This letter introduces a novel on-chip measurement technique for the determination of the central frequency and 3 dB bandwidth of a 60 GHz power amplifier (PA) by performing low frequency temperature measurements. The temperature sensor is embedded in the same silicon die as the PA, and placed in empty spaces next to it. Results confirm that temperature sensors can be used as functional built-in testers which serve to reduce testing costs and enhance yield as part of self-healing strategies.