A family of tunable MOS resistors based on quasi-floating-gate (QFG) transistors biased in the triode region is analyzed in this paper. From the study results, a new device that outperforms previous implementations, is presented. By means of a capacitive divider, the ac component of the drain-to-source voltage scaled with a factor alpha les 1 is added to the gate-to-source voltage leading to a cancellation of the nonlinear terms. The effect of alpha on resistor linearity is analytically studied. Simulation results are also provided for different technologies. Finally, a complete transconductor has been built which preserves the linearity of the MOS resistor. Three versions of the transconductor have been fabricated for different values of alpha (alpha = 0, 0.5, and 1) in a 0.5 mum CMOS technology with plusmn1.65-V supply voltage. Experimental results show (for alpha = 1 ) a THD of - 57 dB (HD2=-70 dB) at 1 MHz for 2-V peak-to-peak differential input signal with a nominal ac-transconductance of 200 muA/V and a power consumption of 3.2 mW.

This study presents a low-voltage bulk-driven CMOS operational transconductance amplifier (OTA) operating in the subthreshold region designed to drive loads up to 10 nF, which is the largest value for this class of amplifiers. To meet this goal, the solution exploits the body terminal of various active devices leveraging local positive feedback to enhance the input transconductance gain and implementing dynamic threshold voltage control in the output transistors. This, along with a Slew Rate Enhancer section, significantly improves the OTA current driving capability. Experimental measurements conducted on a prototype, implemented in a 60-nm technology and supplied from 0.35 V, confirm the expected performance demonstrating a SR of 1.1 V/ms for a 10-nF load with a limited quiescent current consumption of 1.4 $\mu$ A.

A novel CMOS linear transconductor is presented. It is basically an improvement of the classical telescopic cascode OTA with source degeneration in which the resistor has been implemented using quasi-floating-gates transistors. It also allows compact implementation of common mode voltage control circuitry in order to save area and power consumption. This transconductor has been designed in a 0.5 mum CMOS technology and the results obtained show a THD of -61 dB at 10 Mhz for a 1 V _pp output voltage. In order to show the feasibility for the implementation of tunable Gm-C filters using the proposed transconductor, a 1 MHz tunable third order Chebyshev low-pass filter suitable for Bluetooth applications has been experimentally validated.

Programmable linear resistors are usually implemented using MOS transistors biased in the triode region. Recently a technique, based on quasi-floating-gate transistors, has been introduced to linearize the V-I characteristic of a MOS transistor operating in the ohmic region. In this paper an improved programmable linear resistor also based on quasi-floating gate techniques is presented, which provides a larger conductance than the conventional fixed gate- voltage implementation and features better performance in terms of linearity.