Antonio Torralba

Prof. Antonio Torralba

Full Professor, Universidad de Sevilla, Spain
orcid

Research Focus & Metrics

Academic Career Length

36Years (1991-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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25 July 2005 in IEEE Transactions on Circuits and Systems I: Regular Papers
Verified
Journal Article
Closed access
Ramon Gonzalez CarvajalRamon Gonzalez Carvajal
Ramon Gonzalez Carvajal
JRJ. Ramirez-Angulo
J. Ramirez-Angulo
Antonio J. Lopez-MartinAntonio J. Lopez-Martin
Antonio J. Lopez-Martin
Antonio TorralbaAntonio Torralba
Antonio Torralba
JGJuan Antonio Gómez-Galán
Juan Antonio Gómez-Galán
FMFernando MunozChavero
Fernando MunozChavero
In this paper, a basic cell for low-power and/or low-voltage operation is identified. It is evidenced how different versions of this cell, coined as "flipped voltage follower (FVF)" have been used in the past for many applications. A detailed classification of basic topologies derived from the FVF is given. In addition, a comprehensive list of recently proposed low-voltage/low-power CMOS circuits based on the FVF is given. Although the paper has a tutorial taste, some new applications of the FVF are also presented and supported by a set of simulated and experimental results. Finally, a design example showing the application of the FVF to build systems based on translinear loops is described which shows the potential of this cell for the design of high-performance low-power/low-voltage analog and mixed-signal circuits.

25 June 2003
Verified
Conference Paper
Closed access
JRJ. Ramirez-Angulo
J. Ramirez-Angulo
Ramon Gonzalez CarvajalRamon Gonzalez Carvajal
Ramon Gonzalez Carvajal
Antonio TorralbaAntonio Torralba
Antonio Torralba
JGJ. Galan
J. Galan
AVAlfredo Perez Vega-Leal
Alfredo Perez Vega-Leal
JTJ. Tombs
J. Tombs
In this paper a new basic cell for low-power and/or low-voltage operation is identified. It is shown that different versions of this cell, called "flipped voltage follower", have been used in the past for different applications. New circuits using this cell are also proposed here.

7 August 2002 in IEEE Transactions on Fuzzy Systems
Verified
Journal Article
Closed access
Federico BarreroFederico Barrero
Federico Barrero
Angel Gaspar Gonzalez-RodriguezAngel Gaspar Gonzalez-Rodriguez
Angel Gaspar Gonzalez-Rodriguez
Antonio TorralbaAntonio Torralba
Antonio Torralba
EGEduardo Galván
Eduardo Galván
LFLeopoldo Franquelo
Leopoldo Franquelo
This paper presents a new approach to indirect vector control of induction motors. Two nonlinear controllers, one of sliding mode type and the other PI-fuzzy logic-based, define a new control structure. Both controllers are combined by means of an expert system based on Takagi-Sugeno fuzzy reasoning. The sliding-mode controller acts mainly in a transient state while the PI-like fuzzy controller acts in the steady state. The new structure embodies the advantages that both nonlinear controllers offer: sliding-mode controllers increasing system stability limits, and PI-like fuzzy logic based controllers reducing the chattering in permanent state. The scheme has been implemented and experimentally validated.

30 November 2004 in IEEE Journal of Solid-State Circuits
Verified
Journal Article
Closed access
KPK. Philips
K. Philips
PNP.A.C.M. Nuijten
P.A.C.M. Nuijten
RRR.L.J. Roovers
R.L.J. Roovers
ARA.H.M. van Roermund
A.H.M. van Roermund
FMFernando MunozChavero
Fernando MunozChavero
Antonio TorralbaAntonio Torralba
Antonio Torralba
Receivers are being digitized in a quest for flexibility. Analog filters and programmable gain stages are being exchanged for digital processing at the price of a very challenging ADC. This paper presents an alternative solution where the filter and programmable gain functionality is integrated into a /spl Sigma//spl Delta/ ADC. The novel filtering ADC is realized by adding a high-pass feedback path to a conventional /spl Sigma//spl Delta/ ADC while a compensating low-pass filter in the forward path maintains stability. As such, the ADC becomes highly immune to interferers even if they exceed the maximum allowable input level for the wanted channel. As a consequence, the ADC input range can be programmed dynamically to the level of the wanted signal only. This results in an input-referred dynamic range of 89 dB in 1-MHz bandwidth and an intentionally moderate output signal-to-noise-and-distortion ratio of 46-59 dB (depending on the programmed gain). The merged functionality enables a better overall power/performance balance for the receiver baseband. The design consumes less than 2 mW and active area is 0.14 mm/sup 2/ in a 0.18-/spl mu/m digital CMOS technology.

14 February 2005 in IEEE Transactions on Circuits and Systems I: Regular Papers
Verified
Journal Article
Closed access
JGJuan Antonio Gómez-Galán
Juan Antonio Gómez-Galán
Ramon Gonzalez CarvajalRamon Gonzalez Carvajal
Ramon Gonzalez Carvajal
Antonio TorralbaAntonio Torralba
Antonio Torralba
FMFernando MunozChavero
Fernando MunozChavero
JRJ. Ramirez-Angulo
J. Ramirez-Angulo
A new operational transconductance amplifier and capacitor based sinusoidal voltage controlled oscillator is presented. The transconductor uses two cross-coupled class-AB pseudo-differential pairs biased by a flipped voltage follower, and it exhibits a wide transconductance range with low power consumption and high linearity. The oscillator has been fabricated in a standard 0.8-/spl mu/m CMOS process. Experimental results show a frequency tuning range from 1 to 25 MHz. The amplitude is controlled by the transconductor nonlinear characteristic. The circuit is operated at 2-V supply voltage with only 1.58 mW of maximum quiescent power consumption.

13 May 2003 in IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
Verified
Journal Article
Closed access
JRJ. Ramirez-Angulo
J. Ramirez-Angulo
CUC.A. Urquidi
C.A. Urquidi
Ramon Gonzalez CarvajalRamon Gonzalez Carvajal
Ramon Gonzalez Carvajal
Antonio TorralbaAntonio Torralba
Antonio Torralba
Antonio J. Lopez-MartinAntonio J. Lopez-Martin
Antonio J. Lopez-Martin
A new family of very low-voltage analog circuits is introduced. These circuits do not show the GB degradation that characterizes other low-voltage approaches based on floating-gate transistors. The proposed approach is validated with experimental results of a CMOS mixer in 0.5-/spl mu/m CMOS technology with 0.7-V input signal swing that operates on a single 0.8-V supply with transistor threshold voltages of 0.67 V.