hassan Maher

Dr. hassan Maher

Sherbrooke University
+1
orcid

Research Focus & Metrics

Academic Career Length

11Years (2016-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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13 April 2018 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
ALAdrien Letellier
Adrien Letellier
MDMaxime R. Dubois
Maxime R. Dubois
João Pedro TrovãoJoão Pedro Trovão
João Pedro Trovão
HMhassan Maher
hassan Maher
This paper is concerned with the determination of parasitic inductance values in very fast switching power devices. To keep improving today's power converters, new technologies are studied, which exhibit very low switching times. The wide-bandgap semiconductors are among the key aspects of these improvements. Thanks to their internal properties, they allow very fast di/dt and dv/dt with very small footprint. Stray loop inductance needs to be kept low, as it creates high peak voltage upon switching of a transistor with fast di/dt . In particular, the stray inductance value with respect to the loop size and geometry needs to be calculated accurately at the design stage of the power converters. This paper analyzes three loop geometries and studies one with minimized stray inductance and optimal current distribution. An analytical method is proposed, which uses the Biot-Savart law for an accurate analytical estimation of the magnetic field intensity in the selected geometry, leading to inductance calculation. A comparison between the classical two-plate inductance estimation formula and the proposed stray inductance estimation is presented, proving more accurate value with the method proposed in this paper. Finally, an experiment has validated the new inductance estimation formula.

14 July 2021 in Energies
Verified
Journal Article
Open access
PDF file
NTNedal Al Taradaeh
Nedal Al Taradaeh
EFEric Frayssinet
Eric Frayssinet
CRChristophe Rodriguez
Christophe Rodriguez
FMFrederic Morancho
Frederic Morancho
SCsonneville camille
sonneville camille
HMhassan Maher
hassan Maher
This paper proposes a new technique to engineer the Fin channel in vertical GaN FinFET toward a straight and smooth channel sidewall. Consequently, the GaN wet etching in the TMAH solution is detailed; we found that the m-GaN plane has lower surface roughness than crystallographic planes with other orientations, including the a-GaN plane. The grooves and slope (Cuboids) at the channel base are also investigated. The agitation does not assist in Cuboid removal or crystallographic planes etching rate enhancement. Finally, the impact of UV light on m and a-GaN crystal plane etching rates in TMAH has been studied with and without UV light. Accordingly, it is found that the m-GaN plane etching rate is enhanced from 0.69 to 1.09 nm/min with UV light; in the case of a-GaN plane etching, UV light enhances the etching rate from 2.94 to 4.69 nm/min.

8 June 2020 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
ACAmmar Chafi
Ammar Chafi
NINadir Idir
Nadir Idir
AVArnaud Videt
Arnaud Videt
HMhassan Maher
hassan Maher
The new power GaN transistors allow to increase the operating frequency of converters to megahertz range, thanks to their low switching time that is of a few nanoseconds or less. This permits to reduce the values and the volume of the passive components, and enhance the power density of power converters. However, inductors needed for energy storage still take a large volume in converters compared with the others components, because of their weak energy density. Further, high-frequency operation require low-losses magnetic materials. In this paper, a design method of PCB inductors is proposed. A flexible ferrite sheet is used to enhance the inductance value and ease the realization of custom-shape devices. The design method of the inductor is based on the optimization of the inductor volume taking into account thermal issues of the magnetic sheets. Also a simulation method is proposed to calculate the equivalent stray capacitance of the inductors. The proposed method provides a losses-volume trade-off that helps designers to optimize the inductor for their application.

15 May 2017 in Physica Status Solidi (a)
Verified
Journal Article
Closed access
PDF file
ACAhmed Chakroun
Ahmed Chakroun
AJAbdelatif Jaouad
Abdelatif Jaouad
MBMeriem Bouchilaoun
Meriem Bouchilaoun
OAOsvaldo Arenas
Osvaldo Arenas
ASAli Soltani
Ali Soltani
HMhassan Maher
hassan Maher

4 April 2019 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
ACA. Cutivet
A. Cutivet
GPG. Pavlidis
G. Pavlidis
BHB. Hassan
B. Hassan
MBM. Bouchilaoun
M. Bouchilaoun
CRC. Rodriguez
C. Rodriguez
HMhassan Maher
hassan Maher
This paper details an extraction procedure to fully model the transient self-heating of transistors from a GaN HEMT technology. Frequency-resolved gate resistance thermometry (f-GRT) is used to extract the thermal impedance of HEMTs with various gate widths. A fully scalable analytical model is developed from the experimental results. In the second stage, transient thermoreflectance imaging (TTI) is used to bring deeper insights into the HEMTs' temperature distribution by individually extracting the transient self-heating of each finger. TTI results are further used to successfully validate the f-GRT results and the modeling of the thermal impedance. Overall, f-GRT is demonstrated to be a fast and robust method for characterizing the transient thermal characteristics of a GaN HEMT. For the first time to the authors' knowledge, a scalable model of the thermal impedance is extracted fully from experimental results.

9 September 2022 in Microelectronics Journal
Verified
Journal Article
Closed access
PRP. Vigneshwara Raja
P. Vigneshwara Raja
CRChristophe Raynaud
Christophe Raynaud
SCsonneville camille
sonneville camille
ANAtse Julien Eric N'Dohi
Atse Julien Eric N'Dohi
HMHervé Morel
Hervé Morel
DPDominique Planson
Dominique Planson