To expedite testing, time-dependent dielectric breakdown (TDDB) analyses are conducted on commercial 4H-SiC mosfet s at high gate-to-source voltages ( $\bm {V_{GS}}$ ), under Fowler–Nordheim conduction only. However, as inferred, such conditions induce impact ionization-generated holes in the dielectric layer (SiO $\bm {_{2}}$ ), resulting in a state transition in the effective dipolar moment. This accelerates the SiO $\bm {_{2}}$ degradation leading to an overestimation of its intrinsic lifetime at typical $V_{GS}$ values for gate driving in power converters. To address this, a physics-based approach is proposed to design TDDB tests under such conditions and to correct the intrinsic lifetime prediction at nominal $\bm {V_{GS}}$ values, shortening the testing time by up to two orders of magnitude. Thus, the proposed method is a well-suited candidate to be considered in SiC power device qualification standards, still under development.

Many kinds of defects are present in AlGaN/GaN-on-Si based power electronics devices. Their identification is the first step to understand and improve device performance. Electron traps are investigated in AlGaN/GaN-on-Si power diodes using deep level transient Fourier spectroscopy (DLTFS) at different bias conditions for two Schottky contact’s etching recipes. This study reveals seven different traps corresponding to point defects. Their energy level E_T ranged from 0.4 eV to 0.57 eV below the conduction band. Among them, two new traps are reported and are etching-related: D3 (E_T = 0.47–0.48 eV; σ ≈ 10⁻¹⁵ cm²) and D7 (E_T = 0.57 eV; σ = 4.45 × 10⁻¹² cm²). The possible origin of the other traps are discussed with respect to the GaN literature. They are proposed to be related to carbon and nitrogen vacancies or to carbon, such as C_N-C_Ga. Some others are likely due to crystal surface recombination, native defects or a related complex, or to the nitrogen antisite: N_Ga.