The aim of this study consists in comparing the effects of temperature on various SiC power devices. Electrical characteristics have been measured for temperatures from 100K to 525K. All devices are suitable for high temperature. However, SiC MOSFETs are not a good choice for cryogenic temperature, while SiC BJTs are less affected by temperature than other components, especially for cryogenic temperature.

Pressureless silver sintering is an interesting die-attach technique that could overcome the reliability limitations of the power electronic devices caused by their packaging. In this paper, we study the manufacturing parameters that affect the die attach: atmosphere, drying time, heating ramp rate, sintering temperature and duration. It is found that sintering under air gives better results, but causes the substrates to oxidize. Sintering under nitrogen keeps the surfaces oxide-free, at the cost of a weaker attach.

The roughness of etched SiC surfaces must be minimized to obtain surfaces with a smooth aspect, avoiding micromasking artifacts originating from re-deposited particles during the etching process. Four varieties of masks, Al, Ni, Si and C, were deposited on the SiC surface by photolithographic process. The C structures were formed by annealing conversion of patterned thick photoresist. On these surfaces, dry etching was performed with an SF6/O2 plasma produced in a Reactive-Ion-Etching (RIE) reactor. Although a better aspect of the surface is obtained with Ni in comparison with Al mask, micromasking could also occur even with Ni if the mask design was not enough spaced out. With C and Si masks, which produce fluorides species with negative boiling temperature, smooth etched surface was obtained without micromasking, even for tight masks covering up to 90% of the SiC surface.

This paper presents the design, fabrication and characterization results obtained on the last generation (third run) of SiC 10 kV PiN diodes from SuperGrid Institute. In forward bias, the 59 mm² diodes were tested up to 100 A. These devices withstand voltages up to 12 kV on wafer (before dicing, packaging) and show a low forward voltage drop at 80 A. The influence of the temperature from 25 °C to 125 °C has been assessed and shows that resistivity modulation occurs in the whole temperature range. Leakage current at 3 kV increases with temperature, while being three orders of magnitude lower than those of equivalent Si diodes. Double-pulse switching tests reveal the 10 kV SiC PiN diode’s outstanding performance. Turn-on dV/dt and di/dt are −32 V/ns and 311 A/µs, respectively, whereas turn-off dV/dt and di/dt are 474 V/ns and −4.2 A/ns.

Edge termination is a critical part of a power devices. Numerous edge termination types have been developed for silicon devices. Implementation of these termination architectures are not straightforward in SiC due to physical and processing specificities: lower junction depths, higher electric field, trench depth and shaping limitations, etc. Two main families of terminations are currently used in commercial devices, pure Field Guard Rings, and JTE + Rings combination. The increasing number of trench commercial devices requires new approaches based on etched rings filled with dielectrics or polysilicon. For epitaxied bipolar devices, MESA with bevel angle termination combined with JTE based architecture are also suitable. In any case, and especially regarding avalanche capability requirements, not only the termination architecture is relevant, but also the passivation type, the channel stopper design, the 3D design. As modelling using conventional tools is not fully reliable, specific complementary characterization methods are needed. For instance, micro-OBIC can be very effective to determine the electric field distribution in the periphery of the power devices.