Danilo Monda

Mr. Danilo Monda

CERN
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orcid

Research Focus & Metrics

Academic Career Length

7Years (2020-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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3 August 2021 in IEEE Transactions on Nuclear Science
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Journal Article
Closed access
DMDanilo Monda
Danilo Monda
GCGabriele Ciarpi
Gabriele Ciarpi
Sergio SaponaraSergio Saponara
Sergio Saponara
This article presents the design of an LC -Tank voltage-controlled oscillator (VCO) for space and high-energy physics (HEP) applications. The main goal of this work is to design a radiation-hard oscillator to be integrated into a phase-locked loop (PLL), compliant with (but not limited to) SpaceFibre protocol requirements, which is able to support the 6.25 GHz frequency. The full custom schematic and layout of the LC -VCO are reported in this work. The LC -VCO is implemented in a commercial 65 nm CMOS technology, and its electrical characterization highlights a tuning range (TR) from 5.4 to 6.8 GHz. An experimental chip was fabricated and irradiated with X-rays up to 1 Grad (SiO 2 ) total ionizing dose (TID) level at CERN facility. The TID experiment and measurement results are analyzed and discussed. The LC -VCO shows a frequency degradation of 2.54% and a 3.34% increment in phase noise at 1 Grad TID. The results achieved are of interest for both space and HEP applications.

13 May 2022 in IEEE Transactions on Circuits and Systems I: Regular Papers
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Journal Article
Open access
GCGabriele Ciarpi
Gabriele Ciarpi
SCSimone Cammarata
Simone Cammarata
DMDanilo Monda
Danilo Monda
SFStefano Faralli
Stefano Faralli
PVPhilippe Velha
Philippe Velha
Sergio SaponaraSergio Saponara
Sergio Saponara
This paper presents the design and the experimental characterization of a 10 Gb/s electronic driver for silicon Mach-Zehnder modulators (MZMs). This driver is able to operate in harsh environments characterized by radiation levels up to 1 Grad(SiO 2 ) total ionizing dose (TID). To compensate for the detrimental effects that radiation produces on the target 65 nm bulk silicon technology both device- and circuit-level radiation hardened by design (RHBD) techniques are developed and implemented. Extreme TID levels are faced using long-channel transistors with enclosed layout, avoiding the use of p-MOSFETs, and implementing a differential self-biased cascode architecture with common-mode feedback. Band-widening techniques, e.g., inductive peaking, cross-coupled capacitors, and buffer chaining, have been used to improve the driver’s frequency response and reach the targeted data rate. Electrical measurements show 10 Gb/s waveforms with an eye diagram amplitude suitable for MZM driving. Electro-optical measurements performed connecting the electronic driver to a silicon photonic MZM confirm the achievement of a 10 Gb/s system-level operability. The radiation hardness of the driver is verified by exposing the integrated circuit to X-rays. The measurements confirm the ability of the driver to work up to 1 Grad with an eye amplitude reduction of only 10% and a 7% increment in the rise and fall times, validating the effectiveness of the implemented RHBD techniques.

17 August 2020 in Sensors
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Journal Article
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DMDanilo Monda
Danilo Monda
GCGabriele Ciarpi
Gabriele Ciarpi
Sergio SaponaraSergio Saponara
Sergio Saponara
This work presented a comparison between two Voltage Controlled Oscillators (VCOs) designed in 65 nm CMOS technology. The first architecture based on a Ring Oscillator (RO) was designed using three Current Mode Logic (CML) stages connected in a loop, while the second one was based on an LC-tank resonator. This analysis aimed to choose a VCO architecture able to be integrated into a rad-hard Phase Locked Loop. It had to meet the requirements of the SpaceFibre protocol, which supports frequencies up to 6.25 GHz, for space applications. The full custom schematic and layout designs are shown, and Single Event Effect simulations results, performed with a double exponential current pulses generator, are presented in detail for both VCOs. Although the RO-VCO performances in terms of technology scaling and high-integration density were attractive, the simulations on the process variations demonstrated its inability to generate the target frequency in harsh operating conditions. Instead, the LC-VCO highlighted a lower influence through Process-Voltage-Temperature simulations on the oscillation frequency. Both architectures were biased with a supply voltage of 1.2 V. The achieved results for the second architecture analyzed were attractive to address the requirements of the new SpaceFibre aerospace standard.

3 February 2023 in Electronics
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Journal Article
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GCGabriele Ciarpi
Gabriele Ciarpi
DMDanilo Monda
Danilo Monda
MMMarco Mestice
Marco Mestice
DRDaniele Rossi
Daniele Rossi
Sergio SaponaraSergio Saponara
Sergio Saponara
The current trend of increasing the complexity of hardware accelerators to improve their functionality is highlighting the problem of sharing a high-frequency clock signal for all integrated modules. As the clock itself is becoming the main limitation to the performance of accelerators, in this manuscript, we present the design of an asymmetric Ring Oscillator-Voltage-Controlled Oscillator (RO-VCO) based on the Current Mode Logic architecture. The RO-VCO was designed on commercial-grade 65 nm CMOS technology, and it is capable of driving large capacitance loads, avoiding the need for additional buffers for clock-trees, reducing the silicon area and power consumption. The proposed RO-VCO is composed of three closed-loop differential and asymmetrical stages, and it is able to tune the working frequency in the range from 4.72 GHz to 6.12 GHz. The phase noise and a figure of merit of −103.2 dBc/Hz and −186 dBc/Hz were obtained at 1 MHz offset from the 5.5 GHz carrier. In this article, the analytical model, full custom schematic, and layout of the proposed RO-VCO are presented and discussed in detail together with the experimental electrical and thermal characterization of the fabricated device.

3 September 2021 in Electronics
Verified
Journal Article
Open access
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DMDanilo Monda
Danilo Monda
GCGabriele Ciarpi
Gabriele Ciarpi
Sergio SaponaraSergio Saponara
Sergio Saponara
In this paper, we discuss the diagnosis of particle-induced failures in harsh environments such as space and high-energy physics. To address these effects, simulation-before-test and simulation-after-test can be the key points in choosing which radiation hardening by design (RHBD) techniques can be implemented to mitigate or prevent failures. Despite the fact that total ionising dose (TID) has slow but destructive effects overtime on silicon devices, single-event effect (SEE) impulsively disrupts the typical operation of a circuit with temporary or permanent effects. The recently released SpaceFibre protocol drives the current requirements for space applications, and the future upgrade of the LHC experiment scheduled by CERN will require a redesign of the electronic front-end to sustain a radiation level up to the 1 Grad TID level. The effects that these two environments have on two different architectures for high-radiation and high-frequency data transmission are reported, and the efficiency of the mitigation techniques implemented, based on simulations and measurement tests, in the commercial 65 nm technology, are exploited.