7 July 2021 in IEEE Transactions on Circuits and Systems I: Regular Papers
An ultra-low quiescent current tri-mode DC-DC buck converter is presented in this paper, which is able to handle a 100,000X load range. In pulse width modulation (PWM) and pulse frequency modulation (PFM) mode, adaptive on-time (AOT) V2 control is utilized to achieve seamless mode transition and constant switching frequency in PWM mode. A deep green mode (DGM) is proposed for light load, where both the switching loss and the power of control circuitry are minimized. By reducing the comparator current, a delay-based hysteresis window adaptive to load current is generated, reducing the switching frequency and the loss. Meanwhile, the average current of zero current detector (ZCD) and AOT controller are reduced significantly by dynamic biasing. As a result, the efficiency of the converter is improved while maintaining a reasonable output ripple. The proposed converter is implemented in a $0.18\mu $ m BCD technology. Experimental results show that the converter can provide a 1.6 V output from a 2.7 to 4.7V input for $1\mu $ A to 100 mA load, while consuming only 490nA quiescent current. The proposed converter achieves a 92.1% peak efficiency and efficiency can be maintained above 80% in a load range of $20\mu $ A to 60 mA.
17 July 2023 in Antioxidants & Redox Signaling
Significance: Ferroptosis is featured by the accumulation of polyunsaturated-lipid peroxidation on cellular membranes in an iron-dependent manner. Ferroptosis has been implicated in various pathophysiological processes, including cancer, neurodegeneration, and ischemia-reperfusion tissue injury. However, our understanding about the dynamic and context-specific regulation of ferroptosis remains incomplete. Recent Advances: As the major substrate for peroxidation, the cellular lipidome regulates ferroptosis sensitivity and execution by controlling the abundance and availability of polyunsaturated-lipids for peroxidative modifications. In turn, the cellular lipidome is regulated by a complex network of enzymes and transporters, as well as upstream layers of receptors, kinases, and transcription factors. A number of research has shed light on the link between lipid metabolism and ferroptosis. Here, we summarize our current knowledge on the role of the lipidome and associated protein regulators in various stages of ferroptosis, ranging from initiation, execution to cell death evasion by cells experiencing ferroptotic stress. Critical Issues: This review provides an overview of the mechanisms underlying lipid peroxidation and ferroptosis by discussing the lipid species that directly contribute to lipid peroxidation and ferroptosis, how cells regulate the abundances of these pro-ferroptosis lipids, how lipid peroxidation causes cell death, and how cells prevent and repair membrane lipid damage under ferroptotic conditions. Future Directions: Cell fate regulation in vivo could be different from in vitro culture settings. We envision that a comprehensive and detailed understanding about these important questions in the dynamic regulation of ferroptosis in vivo will accelerate our development of ferroptosis-targeted therapies to improve human health.
28 November 2023 in IEEE Journal of Solid-State Circuits
This article presents a low-power, high-resolution, high dynamic range (DR) current-mode direct-to-digital converter (CM-DDC) using a noise-shaping triple-slope quantizer. Both thermal and quantization noises can be first-order shaped out of band, increasing the resolution effectively. High resolution can be realized without using a high sampling rate or high-order shaping architecture. A coarse-fine zoom style quantization is exploited, which reduces the conversion time and, thus, the power consumption of active circuit blocks with dynamic biasing. On the circuit level, a chopped current digital-to-analog converter (DAC) is proposed to reduce 1/ $f$ noise of the current DAC, enhancing the DR. The CM-DDC with light-emitting diode (LED) driver and digital control circuitry is implemented in a standard 55-nm CMOS process and characterized experimentally. The converter achieves a signal-to-noise and distortion-ratio (SNDR) of 94.7 dB and a cross-scale DR of 136.5 dB in 20-Hz bandwidth with 30- $\mu \text{W}$ power for photoplethysmography (PPG)/near-infrared spectroscopy (NIRS) applications. Thanks to the shortened conversion time, the converter’s sampling frequency and signal bandwidth can be adjusted to 200 Hz and 2 kHz, achieving 90.5- and 79.2-dB SNDR, respectively, which allows various current sensing applications. The proposed CM-DDC is also validated with on- body chest PPG measurement.
18 January 2024 in IEEE Transactions on Circuits and Systems I: Regular Papers
This paper presents a low-power chopper-stabilized capacitively-coupled frontend amplifier with auxiliary-path-based input impedance ( Z $_{\mathbf{in}}$ ) boosting. In order to achieve a high Z $_{\mathbf{in}}$ , a low noise and a small chip area, techniques on both system level and circuit level are implemented. On the system level, small capacitors ( C $_{\mathbf{in}}$ $=$ 0.5 pF, C $_{\mathbf{fb}}$ $=$ 25 fF) are used with a biased pseudo-resistor ( R $=$ 2.5 G $\Omega $ ) fed back to an amplifier internal node. As a result, a high achievable Z $_{\mathbf{in}}$ and low high-pass corner frequency are achieved. On the circuit level, an input capacitance shielded current feedback (CSCF) topology achieving effective 10 fF C $_{\mathbf{amp}}$ is proposed as the core of the capacitive feedback amplifier in order not to increase the input noise. Moreover, the design space of auxiliary-path-based boosting is explored to obtain the optimal value of buffer bandwidth and auxiliary capacitor size to save power. The amplifier and its Z $_{\mathbf{in}}$ boosting circuit are implemented in a standard 55 nm CMOS process and characterized experimentally. Measurement results show that the proposed amplifier provides an input noise density of 50 nV/ $\surd$ Hz, and an integrated noise of 0.85 $\mu$ V $_{\mathbf{rms}}$ in 200 Hz band. The Z $_{\mathbf{in}}$ is boosted to 1.92 G $\Omega $ at DC and 1.02 G $\Omega $ at 50 Hz with only 1.0 $\mu$ A in each auxiliary path buffer. The amplifier also archives 77 dB CMRR and 76 dB PSRR while consuming 20.3 $\mu$ W in total.
4 July 2024 in IEEE Transactions on Biomedical Circuits and Systems
This paper proposed an event-driven clockless level-crossing ADC (LC-ADC) suitable for biomedical applications. Thanks to the LC loop, the sampling rate of the converter automatically adapts to the input activities. Activity-dependent power consumption and data compression can thus be realized, saving system power, especially during time-sparse signal acquisition. Meanwhile, a SAR-assisted loop is exploited to resolve the loop-delay-induced distortion in conventional LC-ADC. Therefore, the resolution and power efficiency of the LC-ADC are improved effectively while maintaining the event-driven feature. Implemented in a 55nm process, the proposed LC-ADC achieves a scalable power consumption and a peak SNDR of 62.2dB for a 20kHz input. It also achieves a Walden FoM of 29.7fJ/conv.-step and a Schreier FoM of 158.6dB, which is best in class, without using off-chip calibration. Sub μW power is realized when the input frequency is below 1.5kHz. The proposed LC-ADC is also verified by simulated electrocardiogram (ECG), neural spike, and electromyogram (EMG) signals. It provides a ~7X data compression for ECG input, providing an attractive solution for time-sparse signal acquisition in biomedical applications.
4 July 2024 in IEEE Open Journal of Circuits and Systems
Multiple parameter environment monitoring via wireless internet of thing sensors is growing rapidly, thanks to low power techniques of the node. More importantly, the ever more complex and highly efficient energy harvesting systems enable long-term continuous monitoring in inaccessible environments without needing to change the battery. This paper reviews existing energy harvesting modalities, including photovoltaic, piezoelectric, pyroelectric, electromagnetic, and vibration, together with circuit techniques of interfacing power management circuits for energy harvesters. Moreover, techniques used to interface with multiple mode energy harvesters to obtain a stable output power with optimal power efficiency are discussed as an emerging direction. The state-of-the-art energy harvesting systems together with future development trends are provided.