One of the serious issues that a Power System faces is the Power Quality (PQ) disturbance which occur mainly because of the non-linear loads. Among these PQ disturbances, harmonics play a vital role which should to be mitigated along with reactive power compensation. In this paper, a modified seven-level boost Active-Neutral-Point-Clamped (7LB-ANPC) inverter is utilized as a Shunt Active Power Filter (SAPF). Another vital aspect of this work is to retain the link voltage across the capacitor, which is accomplished through a PI controller tuned with an Adaptive Neuro-Fuzzy Inference System (ANFIS). An adaptive instantaneous p-q theory is instigated in the direction of extracting reference current and the harmonic extraction is carried out by using Radial Basis Function Neural Network (RBFNN). Gating sequence of inverter is generated for the outputs, which are attained from ANFIS and RBFNN and thus the opposite harmonics are injected to the Point of Common Coupling (PCC) by which current harmonics are eliminated with reactive power compensation. The 7Lb-ANPC inverter has a minimized number of switching devices with low switching losses and high boosting ability. By RBFNN based reference current generation, the source current THD of 0.89% is achieved. The proposed methodology is simulated through MATLAB and in hardware by utilizing FPGA Spartan 6E.

Renewable energy (RE) resources have reached the top-notch state in satisfying the energy demands of recent days. Solar photovoltaic (PV) is considered as a clean form of energy among the various RE resources. A novel single-phase grid-integrated solar PV system with Re-lift Luo converter with aid of a chicken swarm (CS) optimization algorithm is presented. The Re-lift Luo converter is implemented as it has maximum power density, extreme efficacy, high-voltage-gain ratio, and reduced switching losses. Since the PV output is intermittent, the output of the converter also gets varied, which will be maintained constant by implementing a proportional–integral (PI)-based closed loop control through the optimized CS algorithm. The normalized output is further applied to the grid via single-phase voltage source inverter. A battery is utilized to store the daytime’s solar energy and discharges to the grid during the night time. The monitoring of the battery’s state of charge (SoC) is performed by recurrent neural network (RNN). A PI controller achieves the real and reactive grid side power control. The novelty of the proposed work is the utilization of three control strategies such as PI, CS, and RNN in improving the overall performance of a grid connected system in improving the power quality. Proper control and analysis of the converters and battery through intelligent controllers are the major objectives of the paper. The outcome of the proposed concept reigns in the improvement of power quality and the proper estimation of SoC, which was supported by the detailed simulation and experimental studies. The proposed configuration is verified by simulation in MATLAB/Simulink and also tested in a real-time experimental setup, and the obtained results are as per the IEEE standards.

In this paper, an enhanced voltage sorting algorithm is proposed for balancing each sub module capacitor voltage in modular multilevel converter (MMC). However, the submodule (SM) voltage strategy becomes more complex when it increases to a number of levels, which eventually increases voltage ripples and circulating current. In order to overcome this problem, an enhanced voltage sorting algorithm is proposed, which implies an enhanced control logic function for capacitor voltage balancing of the converter. The switching pattern of each SM floating capacitor is determined based on the modulating signal methodology, which is then compared with the hybrid state condition using arm current direction in the MMC. Additionally, the generated hybrid signals are once again compared with the dynamic implicit number by conjoining the switching logic state variables. Due to this comparison of logic function, the capacitor voltage is balanced properly and reduces the capacitor ripple voltage to a permissible limit compared to the conventional method. Hence, compared to other balancing techniques, the circulating current is reduced by using conventional control techniques. The desired pulse signals for the power devices are obtained based on the multi carrier pulse width modulation techniques. The superior performance of the proposed algorithm is tested using MATLAB/Simulink software and real time laboratory hardware setup for different load conditions. Apart from this, the effective performance of the proposed method has been validated in the HVDC transmission system.

In order to increase the application of renewable energy sources in the hybrid electrical vehicle application and also for zero tailpipe emission, a typical DC power converter interface in addition of effective control of power flow is very important. On that aim, a novel four port dc–dc power converter with bidirectional power flow is proposed to integrate the two input ports for photovoltaic (PV) and battery to two output ports for motor load and light load. The MPBC is customized for operating in buck and boost states with power flow control in both directional through changing the switching combinations. This system is implemented in hybrid e-vehicles (HEVs), where different level of dc voltages at battery and motor needs to be connected with the capability of bi-directional flow of power in regenerative action of vehicle to charge the battery. The different states of operation, steady state analysis, control scheme to regulate the power are presented. Power loss analysis is carried out to do proper design with more efficiency. The proposed converter simulation is done using MATLAB/Simulink to verify the validity of design, its behaviors and hardware response in different states of operation.

In this work, a high step-up sextuple voltage boosting 13 switches – 13 level inverter (SVB-13S -13LI) structure was proposed through a pulse width modulation technique with selective harmonic elimination. This topology can deliver six times of voltage boosting capability. A single voltage source, 13 switches, two diodes, and three capacitors are utilized to obtain the objective of this research. This work carried out various tests on the proposed topology to find efficiency, voltage stress, total standing voltage, and voltage gain. The detailed comparative study of existing inverter topologies is tabulated to prove the proposed topology has a better performance. The main feature of this topology is six times voltage boosting, a minimum number of switches, less voltage stress, and a self-balanced floating capacitor. Further to isolate or eliminate the undesired low order harmonics the particle swarm optimization-based SHPWM Technique is used. For proving the above-mentioned merits, the simulation was carried out using MATLAB SIMULINK and their corresponding THD results are compared with different Modulation indexes. Also, experimental results are validated by the FPGA SPARTAN 6E controller and their cost function [CF] for the unit price ($) are compared with the state-of-art literature 13-level inverters.

A multilevel inverter plays a predominant role in improving the performance as well as efficiency of the inverter. In this study, the proposed idea of the selective harmonic elimination (SHE) for Duple Voltage Boosting nine-level inverter topology with fewer switching components possesses two times better voltage boosting capability than the considered conventional models. The proposed inverter comprises 12 power semiconductor switches, two capacitors, and a single diode, which is connected to a single dc (direct current) source. The duple 9-level topology has been studied and evaluated under different multicarrier PWM (pulse width modulation) techniques in order to obtain lw THD (total harmonic distortion), and the results proves that the Level Control PWM Technique exhibits a better THD value of 9.35%. To improve the quality of the output waveform, the SHE has been designed to fix the predominant harmonics so that the lower order harmonics are minimized to generate a lower THD. A detailed discussion has been made with the results of the proposed inverter THD, which are then compared with other nine-level inverters MATLAB/SIMULINK that has been used to perform the simulation of the duple model, and the obtained simulation results have been validated for different modulation indices. The FPGA SPARTAN 6E controller tests the experimental prototype of the nine-level inverter, and their cost function is represented in dollars, which is compared with the other similar nine-level inverters.