Gallium nitride (GaN)-based vertical power Schottky barrier diode (SBD) has demonstrated outstanding features in high-frequency and high-power applications. This paper reviews recent progress on GaN-based vertical power SBDs, including the following sections. First, the benchmark for GaN vertical SBDs with different substrates (Si, sapphire, and GaN) are presented. Then, the latest progress in the edge terminal techniques are discussed. Finally, a typical fabrication flow of vertical GaN SBDs is also illustrated briefly.

In this letter, an enhancement-mode (E-mode) GaN p-channel field-effect transistors (p-FETs) with current density of −5.6 mA/mm and ${I} _{{\mathrm {ON}}}/{I} _{{\mathrm {OFF}}}$ ratio of 10 ⁶ was demonstrated on a p-GaN/AlN/AlGaN/GaN heterostructure on Si substrate. A decent ohmic contact resistivity of $9.25 \times 10^{-5} \Omega \cdot {\mathrm {cm}}^{2}$ is achieved by capping the heterostructure with a 10-nm heavily Mg-doped p ⁺⁺ -GaN epilayer. A two-step gate trench etching process, is implemented to overcome the decreased OFF-state blocking voltage associated with the surface p ⁺⁺ -GaN layer. The proposed structure is compelling for monolithic integration of GaN-based logic and power devices.

A Ka-band AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT) with SiN gate dielectric grown by plasma-enhanced atomic layer deposition (PEALD) is demonstrated. The gate reverse leakage current in a controlled HEMT is reduced by about three orders of magnitude by the PEALD-SiN, contributing to an improved breakdown voltage of 92.5 V (source-drain separation of 2.0 μm) in the fabricated MIS-HEMTs. The MIS-HEMTs also feature small threshold voltage hysteresis in dc transfer and capacitance-voltage characterizations, suggesting a good PEALD-SiN/AlGaN interface. The fabricated MIS-HEMTs deliver a high output power density of 7.16 W/mm and a peak power-added efficiency of 60.3%, respectively, at VDS = 30 V and VDS = 10 V in pulse mode at 28 GHz. PEALD-SiN could be a compelling gate dielectric for fabrication of high-power and high-efficiency MIS-HEMTs.

The optimization of mesa etch for a quasi-vertical gallium nitride (GaN) Schottky barrier diode (SBD) by inductively coupled plasma (ICP) etching was comprehensively investigated in this work, including selection of the etching mask, ICP power, radio frequency (RF) power, ratio of mixed gas, flow rate, and chamber pressure, etc. In particular, the microtrench at the bottom corner of the mesa sidewall was eliminated by a combination of ICP dry etching and tetramethylammonium hydroxide (TMAH) wet treatment. Finally, a highly anisotropic profile of the mesa sidewall was realized by using the optimized etch recipe, and a quasi-vertical GaN SBD was demonstrated, achieving a low reverse current density of 10⁻⁸ A/cm² at −10 V.

An obvious increase in the gate leakage current has been commonly observed in GaN HEMTs, after Plasma-enhanced chemical vapor deposition (PECVD) SiN passivation has been observed to obviously increase. This paper presents an Al/SiN stack layer passivation structure. The high gate leakage current in GaN HEMTs caused by the PECVD SiN passivation is distinctly reduced by 2 to 3 orders of magnitude by introducing a thin Al layer. It is mainly attributed to the Al layer blocking and minimizing the damage for the (Al)GaN surface in the build-up of the luminance process of PECVD SiN and then reducing the surface trap density. TEM mapping and SRIM software simulation reveal that neither damage nor inter-diffusion is demonstrated at the Al/AlGaN interface, where a continuous crystalline region is observed. The moderate current collapse suppression and 32.8% improvement in V_BR are achieved in GaN HEMTs with Al/SiN passivation.