Multilevel converters have been under research and development for more than three decades and have found successful industrial application. However, this is still a technology under development, and many new contributions and new commercial topologies have been reported in the last few years. The aim of this paper is to group and review these recent contributions, in order to establish the current state of the art and trends of the technology, to provide readers with a comprehensive and insightful review of where multilevel converter technology stands and is heading. This paper first presents a brief overview of well-established multilevel converters strongly oriented to their current state in industrial applications to then center the discussion on the new converters that have made their way into the industry. In addition, new promising topologies are discussed. Recent advances made in modulation and control of multilevel converters are also addressed. A great part of this paper is devoted to show nontraditional applications powered by multilevel converters and how multilevel converters are becoming an enabling technology in many industrial sectors. Finally, some future trends and challenges in the further development of this technology are discussed to motivate future contributions that address open problems and explore new possibilities.

This paper deals with a crucial aspect in the control of grid-connected power converters, i.e., the detection of the fundamental-frequency positive-sequence component of the utility voltage under unbalanced and distorted conditions. Specifically, it proposes a positive-sequence detector based on a new decoupled double synchronous reference frame phase-locked loop (DDSRF-PLL), which completely eliminates the detection errors of conventional synchronous reference frame PLL's (SRF-PLL). This is achieved by transforming both positive- and negative-sequence components of the utility voltage into the double SRF, from which a decoupling network is developed in order to cleanly extract and separate the positive- and negative-sequence components. The resultant DDSRF-PLL conducts then to a fast, precise, and robust positive-sequence voltage detection even under unbalanced and distorted grid conditions. The paper presents a detailed description and derivation of the proposed detection method, together with an extensive evaluation using simulation and experimental results from a digital signal processor-based laboratory prototype in order to verify and validate the excellent performance achieved by the DDSRF-PLL

Performance of a carrier-based pulsewidth modulation (CB-PWM) strategy can be improved by the inclusion of a zero-sequence voltage in the modulation-reference signal. This paper proposes a new CB-PWM strategy for a three-level neutral-point-clamped (NPC) converter, which is based on a zero-sequence voltage injection. By inclusion of the zero-sequence voltage, the sinusoidal-modulation reference is modified to 1) carry out the voltage-balancing task of the dc-link capacitors, with no additional control effort, 2) reduce the switching losses, and 3) reduce the low-frequency voltage oscillations of the neutral point. The proposed strategy is an alternative approach to the nearest three-vector (NTV) space-vector modulation (SVM) strategy and is obtained by the analysis of the NTV-SVM strategy and establishing a correlation between the NTV-SVM and the CB-PWM strategies. The salient features of the proposed scheme, as compared with the NTV-SVM strategy, are: 1) its reduced computational processing time which is attractive for digital implementation and 2) its reduced switching losses. Compared with the existing CB-PWM strategies, the proposed strategy offers 1) capability to balance the capacitor voltages and reduce the NP voltage oscillations and 2) reduced switching losses. Performance of the proposed CB-PWM strategy for a three-level NPC converter based on time-domain simulation studies in the MATLAB/SIMULINK environment is evaluated and also experimentally verified.

This paper studies different circulating current references for the modular multilevel converter. The circulating current references are obtained from the instantaneous values of the output current and modulation signal of the phase leg. Therefore, the determination of the amplitude and phase of the output current is not needed, which is a significant improvement compared to other methods such as those based on injecting specific harmonics in the circulating currents. Among the different methods studied in this paper, a new method is introduced, which is able to reduce the capacitor voltage ripples compared to the other methods. A closed-loop control is also proposed which is able to track the circulating current references. With the discussed methods, the average values of the capacitor voltages are maintained at their reference while the voltage ripples are kept low. Experimental results are presented to demonstrate the effectiveness of the proposed and discussed methods.

The increasing penetration of renewable energy sources (RES) poses a major challenge to the operation of the electricity grid owing to the intermittent nature of their power output. The ability of utility-scale battery energy storage systems (BESS) to provide grid support and smooth the output of RES in combination with their decrease in cost has fueled research interest in this technology over the last couple of years. Power electronics (PE) is the key enabling technology for connecting utility-scale BESS to the medium-voltage grid. PE ensure energy is delivered while complying with grid codes and dispatch orders. Simultaneously, the PE must regulate the operating point of the batteries, thus for instance preventing overcharge of batteries. This paper presents a comprehensive review of PE topologies for utility BESS that have been proposed either within industry or the academic literature. Moreover, a comparison of the presently most commercially viable topologies is conducted in terms of estimated power conversion efficiency and relative cost.

This paper is related to faults that can appear in multilevel (ML) inverters, which have a high number of components. This is a subject of increasing importance in high-power inverters. First, methods to identify a fault are classified and briefly described for each topology. In addition, a number of strategies and hardware modifications that allow for operation in faulty conditions are also presented. As a result of the analyzed works, it can be concluded that ML inverters can significantly increase their availability and are able to operate even with some faulty components.