The oxygen starvation phenomenon is a dangerous operating condition that reduces the lifetime of PEM fuel cells. The detection and prevention of this undesired phenomenon require estimation of the oxygen excess ratio λ_O2. The mathematical complexities of the reported methods for obtaining λ_O2 complicate its real-time calculation and require high-performance computational devices, which significantly increase the costs of the system. In this paper, a mutual information approach is used in obtaining a simplified mathematical model for the calculation of λ_O2. The usage of such a simplified model requires much less computational power for real-time monitoring of the variable λ_O2, while it provides comparable results to those obtained by using the complex model. Therefore, it represents a cost-effective solution, suitable for usage within applications that require high sampling frequencies, like emulators, converter and air compressor control loops, simulations, etc. In order to validate the accuracy of this simplified λ_O2 calculation model, a real-time monitoring system was built and experimentally tested using both the simplified and complex models. The matching experimental results validate the proposed simplification and justify the use of this simplified model within real-time monitoring applications.

A test bench is proposed to study, at die-level, the power losses and current distribution in power devices. It is based on an infrared camera and a flexible half-bridge resonant inverter with a tunable resonance frequency f _res . With this setup, the die surface temperature is acquired in steady state, while the device is under real operation. The power losses are derived from the temperature mean value averaged, first, over a few switching cycles and, then, across the die surface. By contrast, the current distribution is inferred from the spectral component of the surface thermal map at the switching frequency (f _Sw ). As a proof of concept, two case studies are reported considering 650 V-40 A insulated gate bipolar transistors (IGBTs) soft- and hard-switched within and outside the zero voltage switching condition. First, the power losses are analyzed under switching conditions representative of domestic induction heating applications (f _res = 29.6 kHz) at f _Sw = 40 kHz and f _Sw = 20 kHz. Second, the power losses and local current distribution are investigated when f _res = 9.25 kHz at f _Sw ranged from 8.91 to 9.51 kHz. Such results are assessed with power losses electrical measurements and simulations, obtaining a satisfactory agreement. Moreover, hot spots are identified as current crowding points at f _Sw , whose location is fixed by the bonding wires attachment to the die and the device edge termination. As main benefits of this technique, a higher spatial resolution is achieved and problems related with noisy electrical measurements resulting from the insertion of the used probes or transducers, power circuit stray elements, or device packaging parasitics are avoided.

This paper contributes to investigations on the threshold-voltage (VTH) hysteresis in SiC power MOSFETs. Such effect is of relevance mainly for sub-threshold operation of the devices, but needs to be told apart from stress-related VTH- drift phenomena for technology maturity and reliability validation goals. Important differences exist in commercially available devices, particularly in relation to their gate technology, planar or trench, the latter also showing a marked temperature dependence of the hysteretic range. Based on the experimental characterization of the interface capacitance and charge, this paper puts forward a methodology for determining the types of traps affecting the various devices, with the aim of contributing a tool to assist driving of technological maturity in future generation devices. This paper also shows the potential of capacitance hysteresis measurement to the estimation of the distribution of interface.

To expedite testing, time-dependent dielectric breakdown (TDDB) analyses are conducted on commercial 4H-SiC mosfet s at high gate-to-source voltages ( $\bm {V_{GS}}$ ), under Fowler–Nordheim conduction only. However, as inferred, such conditions induce impact ionization-generated holes in the dielectric layer (SiO $\bm {_{2}}$ ), resulting in a state transition in the effective dipolar moment. This accelerates the SiO $\bm {_{2}}$ degradation leading to an overestimation of its intrinsic lifetime at typical $V_{GS}$ values for gate driving in power converters. To address this, a physics-based approach is proposed to design TDDB tests under such conditions and to correct the intrinsic lifetime prediction at nominal $\bm {V_{GS}}$ values, shortening the testing time by up to two orders of magnitude. Thus, the proposed method is a well-suited candidate to be considered in SiC power device qualification standards, still under development.

The classic shape of a magnetic circuit made of nanocrystalline alloy is usually the toroidal one. In power electronics, this shape is not the best one in terms of size and congestion. For high power magnetic components, the UU or CC shape (the cores look like the letter U or C) is preferred. Recently, two manufacturers have commercialized new magnetic circuits made of nanocrystalline alloy in this last shape. But before using these new products in power electronics, we have to first know them well and to be sure that they will respond adequately to the peculiar needs of the application. In this paper, we compare several cut cores geometric dimensions and magnetic properties from two different manufacturers. Full amplitude characterizations are performed. The dispersions of the samples and the agreement to datasheets are presented.

Silicon-Carbide (SiC) technology presents several advantages over silicon for power electronics applications, such as lower losses. However, SiC technology is not totally mature, and some reliability problems remain. This paper studies the robustness of SiC MOSFETs in the case of diode-less applications and the associated phenomena, such as gate oxide degradation. Several devices were stressed under conditions of inductive switching and inverse current conduction. These devices were periodically characterized. As a result, a threshold voltage shift was observed in the MOSFET, with a dependence on the duty cycle of the transistor. On the contrary, no significant degradation of the internal P-N junction of the transistor was observed.