This work presents detailed characterization and modeling of the reset operation in resistive-switching memories based on metal oxides. Our experimental results confirm previous observations that reset is controlled by Joule heating, providing an insight on the electrical and thermal parameters of the conductive filament (CF) in the low resistance state. The characterization of such parameters allows to model the CF rupture responsible for reset switching. Our model explains the switching by self-accelerated dissolution of the CF, and can quantitatively account for reset and data-retention experiments. The scaling of programming current is finally investigated by means of reduction of CF cross-section.

In silicon nanocrystal based metal–oxide–semiconductor memory structures, tuning of the electron tunneling distance between the Si substrate and Si nanocrystals located in the gate oxide is a crucial requirement for the pinpointing of optimal device architectures. In this work it is demonstrated that this tuning of the “injection distance” can be achieved by varying the ${\mathrm{Si}}^{+}$ ion energy or the oxide thickness during the fabrication of Si nanocrystals by ultralow-energy silicon implantation. Using an accurate cross-section transmission electron microscopy (XTEM) method, it is demonstrated that two-dimensional arrays of Si nanocrystals cannot be positioned closer than 5 nm to the channel by increasing the implantation energy. It is shown that injection distances down to much smaller values (2 nm) can be achieved only by decreasing the nominal thickness of the gate oxide. Depth profiles of excess silicon measured by time-of-flight secondary ion mass spectroscopy and Si nanocrystal locations determined by XTEM are compared with Monte-Carlo simulations of the implanted Si profiles taking into account dynamic target changes due to ion implantation, ion erosion, and ion beam mixing. This combination of experimental and theoretical studies gives a safe explanation regarding the unique technological route of obtaining Si nanocrystals at distances smaller than 5 nm from the channel: the formation of nanocrystals requires that the interface mixing due to collisional damage does not overlap with the range profile to the extent that there is no more a local maximum of Si excess buried in the ${\mathrm{SiO}}_2$ layer.

Good quality and perfectly stoichiometric $\mathrm{Ge}{\mathrm{O}}_2$ layers are promising interlayers to be implemented in alternative devices based on high dielectric constant oxide/Ge(100). In this work, the authors report on the growth by atomic layer deposition of $\mathrm{Ge}{\mathrm{O}}_2$ films using a divalent Ge precursor combined with ${\mathrm{O}}_3$ . The films are composed of smooth and perfectly stoichiometric $\mathrm{Ge}{\mathrm{O}}_2$ . The contamination level is extremely low. The deposited $\mathrm{Ge}{\mathrm{O}}_2$ films have a band gap of $5.81\pm 0.04\mathrm{eV}$ . The conduction and valence band offsets at the $\mathrm{Ge}{\mathrm{O}}_2∕\mathrm{Ge}$ heterojunction are found to be $0.6\pm 0.1$ and $4.5\pm 0.1\mathrm{eV}$ , respectively.

Self-assembling block copolymers generate nanostructured patterns which are useful for a wide range of applications. In this paper we demonstrate the capability to control the morphology of the self-assembling process of PS-b-PMMA diblock copolymer thin films on unpatterned surfaces by means of fast thermal treatment performed in a rapid thermal processing machine. The methodology involves the use of radiation sources in order to rapidly drive the polymeric film above the glass transition temperature. Highly ordered patterns were obtained for perpendicular-oriented cylindrical and lamellar PS-b-PMMA block copolymers in less than 60 s. This approach offers the unprecedented opportunity to investigate in detail the kinetics of the block copolymer self-assembly during the early stages of the process, providing a much deeper understanding of the chemical and physical phenomena governing these processes.

P-doped Si nanocrystals (radius