This article proposes a high-gain and low-power low-noise amplifier (LNA) by adopting a simultaneous noise- and input-matched (SNIM) maximum achievable gain ( G _max ) core. The G _max -core is implemented by adjusting the infinite combinations of embedding networks with three passive elements. Based on the proposed two-port noise analysis for implementing the G _max -core, the input stage G _max -core can achieve a simultaneous power gain and noise matching. The adoption of the G _max -core in the input stage can maximize the amount of gain per stage, leading to higher total power gain and lower noise figure (NF). The two-stage 150-GHz LNA adopting the SNIM G _max -core is implemented in a 65-nm CMOS process. The measurement results show a peak gain of 17.9 dB at 152.2 GHz, 3-dB bandwidth of 11 GHz, NF of 4.7 and 6.2 dB at 148 and 150 GHz, respectively, and a peak power added efficiency (PAE) of 7.7% while dissipating only 13.73 mW. This work shows the highest gain per stage and the lowest NF with the lowest dc power consumption among other reported CMOS D-band amplifiers.

This article presents a 135–155-GHz low-power and high-efficiency frequency multiply-by-9 (x9) frequency-modulated continuous-wave (FMCW) radar transmitter (TX). Starting from a 16-GHz frequency-chirping input signal, cascaded frequency triplers at $V$ -band (40–75 GHz) and $D$ -band (110–170 GHz) bring the signal to the $D$ -band, subsequently amplified and radiated via a power amplifier (PA) and an on-chip antenna at $D$ -band. The $D$ -band PA with a reduced gain of transistors at $f_{\max }$ /2 proposes a broadband gain-boosting technique, achieving a maximum achievable gain ( $G_{\max }$ ) for broad frequency range with high-order embedding passives. The x9 chain proposes phase-controlled frequency triplers that align the phase of each harmonic contribution and boost the third harmonic output power, conversion gain, and dc-to-RF efficiency. Implemented in a 28-nm CMOS process, the TX achieves a measured effective isotropic radiated power (EIRP) of 9.4 dBm, a dc-EIRP efficiency of 16.6% while exhibiting an antenna gain de-embedded output power of 7.1 dBm, and a dc-to-RF efficiency of 9.7% with less than 77-mW dc power consumption.

This letter reports the design of terahertz amplifiers using the concept of maximum achievable gain (Gmax) of a transistor embedded in a linear, lossless, reciprocal network. Implemented in a 65-nm CMOS, by adopting the optimized Gmax-core, 280- and 300-GHz amplifiers achieve peak gain of 12 and 9 dB, peak power-added efficiency (PAE) of 1.6% and 1.4%, and gain per stage of 4 and 3 dB, respectively, while dissipating 17.9 mW, which is the best performance up to date in terms of operating frequency, gain per stage, and PAE in CMOS process.

The nonresonant THz response of CMOS FET has been analyzed based on static nonlinearities of the transistor channel. For the applied gate-to-source and drain-to-source signals, the significance of the second-order nonlinear terms is investigated as a function of dc bias conditions. A cross-coupled design for differential excitation of the THz detector is also proposed, and it has been shown, based on analysis as well as through measurements, that a cross-coupled detector topology can give the highest responsivity in an unbiased-drain operation, among the possible detector topologies. A minimum optical noise equivalent power (NEP) of $\text{29 pW}/\surd \text{Hz}$ is measured for the cross-coupled detector topology at 500 GHz with unbiased drain. The change in the polarity of the detector response under certain bias conditions is also explained. This paper gives a comprehensive picture of the behavior of the CMOS THz detector by discussing the design considerations such as readout modes, optimum bias points, and device dimensions with respect to both responsivity and NEP.

A 139.5–157.7-GHz $D$ -band I/Q radar receiver with an on-chip antenna and a spillover resilient $N$ -path baseband filter is presented. Spillover and its manifestation based on the chirp duration are discussed, and a filter for spillover mitigation is implemented. The radar is characterized by 18-GHz radio frequency (RF) bandwidth, 13-mm range resolution, 55-dB conversion gain, 8-dB NF, and 26-dB narrowband spillover attenuation. The receiver is also capable of selectively mitigating close-by large reflectors, and the system power consumption is 67 mW.