In this paper, a back-illuminated (BSI) time-of-flight (TOF) sensor using 0.2 µm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) technology is developed for long-range laser imaging detection and ranging (LiDAR) application. A 200 µm-thick bulk silicon in the SOI substrate is fully depleted by applying high negative voltage at the backside for higher quantum efficiency (QE) in a near-infrared (NIR) region. The proposed SOI-based four-tap charge modulator achieves a high-speed charge modulation and high modulation contrast of 71% in a NIR region. In addition, in-pixel drain function is used for short-pulse TOF measurements. A distance measurement up to 27 m is carried out with +1.8~−3.0% linearity error and range resolution of 4.5 cm in outdoor conditions. The measured QE of 55% is attained at 940 nm which is suitable for outdoor use due to the reduced spectral components of solar radiation.

A back-illuminated time-of-flight (ToF) image sensor based on a 0.2 µm silicon-on-insulator (SOI) CMOS detector technology using fully-depleted substrate is developed for the light detection and ranging (LiDAR) applications. A fully-depleted 200 µm-thick bulk silicon is used for the higher quantum efficiency (QE) in a near-infrared (NIR) region. The developed SOI pixel structure has a 4-tapped charge modulator with a draining function to achieve a higher range resolution and to cancel background light signal. A distance is measured up to 27 m with a range resolution of 12 cm at the outdoor and average light power density is 150 mW/m²@30 m.

A power-saving readout scheme for CMOS image sensors (CIS) that utilizes the image properties is presented. The proposed delta-readout (Δ-readout) scheme reads the signal difference between two pixels located next to each other. By effectively reducing the dynamic range of the signal, the readout ADC can reduce the number of decision cycles and save power consumption while maintaining the ADC performance at the level of a conventional ADC. The prototype QQVGA CIS with ten 10-bit SAR ADCs in a multi-column-parallel (MCP) configuration was fabricated in a 1P4M 0.18 μm CIS process with metal-insulator-metal (MIM) capacitors. The measurement results show the power-saving effect of 26% depending on the image patterns.