This work presents a new control scheme based on a finite states Model Predictive Control aimed to fix the switching frequency and to reduce the spectrum dispersion on the output variables of pulse width modulation (PWM) static converters. These topics are particularly important in the operation of power converters where passive filters present resonant modes and in the switching losses reduction. Contrary to standard model predictive control algorithms, the proposed scheme allows for obtaining time-continuous outputs from the optimization process. Thus, the advantages of modulated schemes, like a defined spectrum and fixed switching frequency, are inherited. The tradeoff is a slight reduction on the dynamic response, in comparison with previous schemes using direct non-modulated outputs. Simulated and experimental results show the proper performance of the proposed scheme.

In the last decades, finite control set-model predictive control (FCS-MPC) has been extensively investigated. This control strategy uses the system model to determine the optimal input that minimizes a predefined cost function. This procedure is performed by evaluating the admissible inputs of the converter model. In order to achieve a proper performance of the control strategy, a small sampling time must be used. In practice, the computational effort and processing time are critical factors that depend directly on the number of admissible states of the topology. With the objective of reducing the execution time needed by the algorithm, it is possible to take advantage of the high degree of parallelism that can be obtained from a field-programmable gate array (FPGA). This paper deals with the implementation of FCS-MPC in an FPGA XC3S3500E to control a power cell of a cascaded half bridge (CHB) converter. The design is divided into subparts, called modules, which can be projected to control multiple cells using only one chip. In addition, with the aim to restrict the use of hardware to the available resources, the document presents a series of considerations related to the algorithm and its implementation. This paper presents a detailed guide with emphasis on the design and outlining of each module in order to reduce the developing times for researchers in the area of power converters.

Multi-cell converters allow the use of AC motor drives for medium and high voltage level applications using low voltage semiconductors. This type of converter has a multi-pulse transformer which performs the cancellation of the low frequency harmonics generated by the three-phase diode rectifiers. Despite this advantage, the multi-pulse transformer is bulky, heavy, expensive, and must be designed according to the number of power cells, making the transformer topology dependent. This work proposes to reduce the complexity of the transformer in multi-cell converters using Active Front End rectifiers in combination with a Finite Control Set - Model Predictive Control strategy. This is achieved by the strategy as it emulates the multi-pulse transformer harmonic cancellation thanks to the predictive algorithm and the generation of input current references with a phase shift angle for each Active Front End rectifier.

Multilevel converters are widely used in medium voltage applications. One of the most popular topologies in this field is the 18 pulses diode rectifier, which uses a muItipuIse transformer that realizes a current harmonics cancelation that are generated by the three phase diode rectifiers. In this work an efficiency comparison of the aforementioned topology and a Multi-Cell Active-Front-End (AFE) Rectifier operating with Finite Control Set - Model Predictive Control is performed. This efficiency comparison is focused on the rectifier losses divided into two types. The first one is the semiconductors switching and conduction losses. The second one evaluates the transformer losses, which are studied under two criteria: copper losses (Standard IEEE C57.10-1998) and the K - Factor (Standard IEEE / ANSI C57.110). The results show that the diode based rectifier topology has lower semiconductors losses, while the topology based on AFE rectifiers has lower transformers losses and a less complex design. Indeed, a reduction of a 7.2% in copper losses is achieved in the transformer secondary with respect to a multi-pulse transformer secondary.

AC-DC power conversion is an essential process in the industrial area at medium/high voltage levels for AC motor drives, conveyor belt systems, rolling mills, or others. The multilevel converters allow us to work at the voltage levels mentioned and give us a low harmonic content in the AC side of the system. However, these power conversion systems consist in their topology of an input transformer, which is sensitive to low order harmonic currents, generating saturation and increased losses. This work proposes a modulation scheme called Feedback Quantizer, applied to multi-cell active front-end rectifiers, aiming to obtain a focused mitigation of low-frequency current harmonics of the power cell. Furthermore, to ensure the stability of the DC voltage of each power cell, a control strategy consisting of nonlinear control, a first-order filter to the DC voltage reference, and a PI control will ensure stability and zero steady-state error at step input. The simulated results show the correct operation of the proposed scheme.

The use of renewable energy sources (RESs) together with energy storage systems (ESSs) allows for smoothing power variations, thus improving power backup capabilities and power quality in the electric power grid. These applications require power converters to transfer energy between the renewable generator or energy storage and the power grid. In any case, the control algorithm of the power converter requires the synchronization method to provide a correct estimation of the instantaneous voltage of the power grid. This work provides engineers and researchers with an accessible platform at a low cost (less than USD 100) and a methodology for the experimental validation of digital synchronization algorithms as a step before their implementation in grid-connected equipment. The methodology evaluates the performance of the digital algorithms when there are variations in amplitude, frequency, phase, and harmonic content in the emulated three-phase power grid, as well as the execution times (t_ex), while a digital platform emulates the electrical signals and generates reference signals for the evaluation. To illustrate this proposal, two synchronization algorithms—SRF-PLL and DSOGI-PLL with a low-pass filter—are implemented in a digital controller and tested. The evaluation tool confirms the algorithms’ performance and shows that the execution time of DSOGI-PLL is 91% longer than that of SRF-PLL, which is well known in the literature.