Cascaded H-bridge multilevel (CHB-ML) inverters are an attractive alternative for supplying power to ac grids as they have high reliability and offer an acceptable quality of voltage at their output terminals. In order to achieve efficient operation in these CHB-ML inverters, they must work at low switching frequencies. The finite-control set model predictive control (FCS-MPC) scheme is a very intuitive strategy for controlling this type of converter, but traditional FCS-MPC algorithms generally have a steady-state error when operating at low sampling frequencies and/or if there are parameters mismatch in the prediction model, regarding those of the real system. In this article, a grid-connected CHB-ML inverter that uses an improved FCS-MPC scheme is proposed. The proposed strategy eliminates the steady-state error in an MPC operating at low sampling frequencies and maintains correct operation when a change in the control reference occurs. Experimental results from a grid-connected CHB-ML inverter with three units (seven levels) demonstrate the feasibility of the proposal.

Modular current source converters (MCSCs) have been proposed as an alternative method for increasing the power range of medium voltage PWM AC drives. MCSCs are built by stacking parallel current source converters. Two advantages that make MCSCs attractive are: (a) extended current/voltage ratings beyond the device ratings and (b) simplicity in balancing the DC link current in each module. This can be accomplished using two optimized modulating patterns that have been proposed for such topologies: (a) multilevel selective harmonic elimination (MSHE) and (b) displaced selective harmonic elimination (DSHE). Both techniques are based on SHE patterns but there are slight differences in their digital implementation due to the way they generate the harmonic cancellation. Furthermore, when these techniques are used in the rectifier stage, it is reported that MSHE and DSHE do not eliminate all the unwanted harmonics due to practical issues such as changes in the modulating indexes to control the DC link currents. This work compares the operation of DSHE and MSHE when used in rectifiers of an MCSC in terms of execution time, robustness to poor sampling frequency, and quality of harmonic profiles on AC input currents under different operating conditions. Experimental results are presented to validate the theoretical considerations.

A discrete-time linear control strategy for a multilevel three-phase unified power quality conditioner (UPQC) based on single-phase power cells is presented. The multi-variable, nonlinear, and coupled features of these topologies make the control strategy design a difficult task. Controlling this kind of system with single-variable linear controllers-as proposed in this work-presents significant advantages compared with other approaches as simplicity in the design steps due to the large amount of tools developed for this kind of schemes. Particularly, a classic design method based on the root locus approach is used to choose the controllers parameters in order to achieve a given dynamical behavior. Compensation of reactive power and fundamental frequency disturbances is presented in this paper as part of a general control strategy for multilevel active power filters. The proposed control strategy is implemented on the TMS320C6713 DSP-based system for a low-power laboratory prototype, and thus the controllers design is carried out on the discrete-time and -frequency domain. Also, due to the inherent asymmetries among the power cells in a modular topology, a dedicated local control strategy is proposed to ensure a symmetrical distribution of the power among the power cells. This feature allows the semiconductor devices of each module to operate under the same voltage and current ratings. Simulated and experimental results showing stationary and transient conditions demonstrate the feasibility of the control scheme.

An asymmetric inverter features different dc-link voltages for each power cell and depending on the dc voltage ratios, there are binary, trinary, etc., asymmetric topologies. In particular, the trinary one can provide a waveform with 3n levels, where n is the number of cells connected in cascade. Hence, for n = 3, an output voltage with 27 levels can be obtained, ensuring a low total harmonic distortion (THD) and reduced dv/dt. However, when the load consumes active power, some power cells of the inverter can operate in regeneration mode, complicating the topology and control. To overcome this problem, a new modulation method for asymmetric inverters is presented. It features an ac output voltage of 13 levels for n = 3, and ensures unidirectional power flow in every power cell. This new modulation method also provides a voltage waveform with low dv/dt and reduced THD (5.7%). To confirm the approach, power flow and sensitivity analysis to changes in the dc voltage ratios are performed. Finally, simulation and experimental results are provided.

In power electronics equipment, digital control is essential to obtaining a proper operation of the devices. Typical implementations of this control use microprocessors, digital signal processors and Field Programmable Gate Arrays (FPGAs). In this paper, the hardware resources of an FPGA are configured in order to implement the discrete synchronism, abc/dq frame transformations, modulation, and control of a Distribution STATic COMpensator (DSTATCOM) aimed to compensate reactive current. All these tasks are implemented as independent modules to give the system the capability to reconfigure the hardware for any other application with similar requirements. Results show that FPGAs are a suitable platform to implement a power converter digital controller. Also, non-fundamental capabilities can be added to improve the controller performance, such as over-sampling, anti-windup circuits, and time multiplexing. We verify the correctness of the digital controller implemented on the FPGA device using dynamic tests on a laboratory experimental DSTATCOM low-power prototype.

Finite control set model predictive control can be applied to a power converter if there is an accurate existing model of the converter. The best results will be achieved if and only if the parameters and variables that make up the system are properly estimated. If this is not the case, the predictions made using these strategies may be erroneous and cause problems, such as steady-state error with respect to the assigned desired references. This paper presents a predictive control strategy with integral action that compensates for the differences between the estimated model and the inverter with the objective of achieving a zero steady-state error without requiring external loops or state observers. The proposed strategy is tested on a single-phase Z-source inverter so as to evaluate the error in both the ac and dc controlled variables with respect to their references to their cosigns. The experimental results confirm that the proposed strategy achieves a zero error in the steady state while maintaining