This work presents a new control scheme based on a finite states Model Predictive Control aimed to fix the switching frequency and to reduce the spectrum dispersion on the output variables of pulse width modulation (PWM) static converters. These topics are particularly important in the operation of power converters where passive filters present resonant modes and in the switching losses reduction. Contrary to standard model predictive control algorithms, the proposed scheme allows for obtaining time-continuous outputs from the optimization process. Thus, the advantages of modulated schemes, like a defined spectrum and fixed switching frequency, are inherited. The tradeoff is a slight reduction on the dynamic response, in comparison with previous schemes using direct non-modulated outputs. Simulated and experimental results show the proper performance of the proposed scheme.

Cascaded H-bridge multilevel (CHB-ML) inverters are an attractive alternative for supplying power to ac grids as they have high reliability and offer an acceptable quality of voltage at their output terminals. In order to achieve efficient operation in these CHB-ML inverters, they must work at low switching frequencies. The finite-control set model predictive control (FCS-MPC) scheme is a very intuitive strategy for controlling this type of converter, but traditional FCS-MPC algorithms generally have a steady-state error when operating at low sampling frequencies and/or if there are parameters mismatch in the prediction model, regarding those of the real system. In this article, a grid-connected CHB-ML inverter that uses an improved FCS-MPC scheme is proposed. The proposed strategy eliminates the steady-state error in an MPC operating at low sampling frequencies and maintains correct operation when a change in the control reference occurs. Experimental results from a grid-connected CHB-ML inverter with three units (seven levels) demonstrate the feasibility of the proposal.

An asymmetric inverter features different dc-link voltages for each power cell and depending on the dc voltage ratios, there are binary, trinary, etc., asymmetric topologies. In particular, the trinary one can provide a waveform with 3n levels, where n is the number of cells connected in cascade. Hence, for n = 3, an output voltage with 27 levels can be obtained, ensuring a low total harmonic distortion (THD) and reduced dv/dt. However, when the load consumes active power, some power cells of the inverter can operate in regeneration mode, complicating the topology and control. To overcome this problem, a new modulation method for asymmetric inverters is presented. It features an ac output voltage of 13 levels for n = 3, and ensures unidirectional power flow in every power cell. This new modulation method also provides a voltage waveform with low dv/dt and reduced THD (5.7%). To confirm the approach, power flow and sensitivity analysis to changes in the dc voltage ratios are performed. Finally, simulation and experimental results are provided.

Finite Control Set Model Predictive Control (FCS-MPC) is an alternative to conventional linear controllers in power converters due to its attractive properties such as its conceptual simplicity, flexibility, direct consideration of non linearities as well as constraints, and fast control response. This last feature imposes computational constraints and short prediction horizons are therefore needed. In fact, in many applications an horizon one FCS-MPC controller is used. However, using FCS-MPC with a short prediction horizon in topologies that exhibit non-minimum phase behavior such as active-front-end rectifiers, dc-dc boost converters, and Z-source converters, among others, may lead to control issues. This work studies the origin of these control issues using nonlinear control theory considering a dc-dc boost converter as a case study. It is shown that the difficulty to directly control the converter output voltage using short horizon FCS-MPC is the resulting unstable internal dynamic, as the short horizon FCS-MPC controller acts like an input-output linearizing controller. To solve the problem of the unstable internal dynamic, a short horizon FCS-MPC controller based on input-state linearization is proposed allowing correct operation of the system. Experimental results show the feasibility of the proposal.

This paper presents a new finite control set model predictive control strategy that, contrary to conventional approaches, achieves (i) zero steady-state error in the converter’s AC current, and (ii) both fixed and lower harmonic spectrum, similar to that achieved by pulse width modulation based control schemes. These characteristics are attractive for medium and high voltage applications where high dv/dt is prohibitive and reduced switching losses are a must, or in applications that use passive filters and where a spread harmonic spectrum can cause resonances. The proposed strategy achieves dynamic results similar to those of conventional predictive control and a steady-state performance similar to that of a modulated control strategy. To do so, the strategy utilizes a modulated integral action to incorporate an input restriction into a conventional predictive control cost function. A grid-connected cascaded H-Bridge multilevel inverter is used to validate the strategy. Simulated and experimental results in both steady and transient states are presented to verify the proposed strategy’s performance in the converter.

In the last decades, finite control set-model predictive control (FCS-MPC) has been extensively investigated. This control strategy uses the system model to determine the optimal input that minimizes a predefined cost function. This procedure is performed by evaluating the admissible inputs of the converter model. In order to achieve a proper performance of the control strategy, a small sampling time must be used. In practice, the computational effort and processing time are critical factors that depend directly on the number of admissible states of the topology. With the objective of reducing the execution time needed by the algorithm, it is possible to take advantage of the high degree of parallelism that can be obtained from a field-programmable gate array (FPGA). This paper deals with the implementation of FCS-MPC in an FPGA XC3S3500E to control a power cell of a cascaded half bridge (CHB) converter. The design is divided into subparts, called modules, which can be projected to control multiple cells using only one chip. In addition, with the aim to restrict the use of hardware to the available resources, the document presents a series of considerations related to the algorithm and its implementation. This paper presents a detailed guide with emphasis on the design and outlining of each module in order to reduce the developing times for researchers in the area of power converters.