We characterized the thermal behavior of a 65 nm bulk CMOS transistor, by measuring the self-heating effect (SHE) as a function of bias condition. We demonstrated that at a base temperature of 6.5 K the channel temperature of the transistor can increase up to several tens of kelvins due to power dissipation. The thermal behavior of the transistor is determined not only by the thermal response of the transistor itself but also by the thermal properties of the surroundings, i.e., source, drain, bulk, and gate interfaces, metal contacts, and vias. On top of it, the thermal response is bias-dependent through bias dependence of power and self-heating. This information becomes relevant for proper design of integrated circuits for quantum computing or other cryogenic applications, where the circuitry requires to be operated at a stable cryogenic temperature.
20 September 2018 in Revista Internacional de Métodos Numéricos para Cálculo y Diseño en Ingeniería
This work presents a simpler numerical design method for efficiency maximization of an Hydraulic Jet Pump (HJP) for oil-well extraction process, considering its hydraulic and geometric parameters. The design process consists in setting and solving a constrained non-linear optimization problem by taking into account the hydraulic model of the HJP in terms four design variables: throat area, nozzle area, injection flow, and injection pressure to the oil-well. The objective function of this case aims to maximize the HJP's efficiency avoiding to approach cavitation condition as well fulfilling technical constraints. A numerical technique, Differential Evolution Algorithm (DEA), has been implemented to solve the optimization problem. The proposed methodology leads to a solution set by considering only commercial geometries and feasible operating conditions for the HJP, which facilitates its practical implementation. A set of ten oil-wells with land production data, operating in the southeaster of Mexico, is used to compare and validate several Jet pump designs, i. e., through comparison with actual oil-well's operation condition.
Random Telegraph Noise has been experimentally characterized in two sets of nMOSFET devices under the influence of perpendicular magnetic fields at room temperature. The experimental measurements were performed following a systematic trapping phenomena characterization protocol. The results reveal that the drain-source current exhibits an unexpected Random Telegraph Noise trace suggesting variations in the trapping/detrapping mechanisms depending on the magnitude and direction of the magnetic field. The anomaly reported in this letter highlights the need to reevaluate our understanding of the transistor response under weak magnetic fields at room temperature.
Based on S-parameter measurements, the effect of dynamic trapping and de-trapping of charge in the gate oxide, the increase of dielectric loss due to polarization, and the impact of leakage current on the small-signal input impedance at RF is analyzed and represented. This is achieved by systematically extracting the corresponding model parameters from single device measurements at different frequency ranges, and then the methodology is applied to analyze the evolution of these parameters when the device is submitted to non-conducting electrical stress. This approach not only allows to inspect the impact of effects not occurring under DC conditions, such as the current due to the time varying dielectric polarization, but also to clearly distinguish effects in accordance with the functional form of their contribution to the device’s impedance. In fact, it is shown that minor changes in the model of the gate capacitance by including additional resistive and capacitive components allows for an excellent model-experiment correlation up to 30 GHz. Moreover, the accuracy of the correlation is shown to be maintained when applying the proposal to the device under different gate-to-source bias conditions and at several stages during off-state degradation.
This paper introduces a two-dimensional (2D) numerical simulation of the amplification of space charge waves using negative differential conductance in a typical MOS silicon–germanium (SiGe)-based field-effect transistors (FET) and complementary metal oxide semiconductor (CMOS) technology at 4.2 K. The hydrodynamic model of electron transport was applied to describe the amplification of space charge waves in this nonlinear medium (i.e., the negative differential conductance). This phenomenon shows up in GaAs thin films at room temperature. However, this can be also observed in a strained Si/SiGe heterostructure at very low temperatures (T < 77 K) and at high electric fields (E > 10 KV/cm). The results show the amplification and non-linear interaction of space charge waves in a strained Si/SiGe heterostructure occurs for frequencies up to approximately 60 GHz at T = 1.3 K, 47 GHz at T = 4.2 K, and 40 GHz at T = 77 K. The variation of concentration and electric field in the Z and Y directions are calculated at 4.2 K. The electric field in the Z direction is greater than in the Y direction. This is due to the fact that this is the direction of electron motion. In addition to deep space applications, these types of devices have potential uses in terrestrial applications which include magnetic levitation transportation systems, medical diagnostics, cryogenic instrumentation, and superconducting magnetic energy storage systems.