Training and recognition with neural networks generally require high throughput, high energy efficiency, and scalable circuits to enable artificial intelligence tasks to be operated at the edge, i.e., in battery-powered portable devices and other limited-energy environments. In this scenario, scalable resistive memories have been proposed as artificial synapses thanks to their scalability, reconfigurability, and high-energy efficiency, and thanks to the ability to perform analog computation by physical laws in hardware. In this work, we study the material, device, and architecture aspects of resistive switching memory (RRAM) devices for implementing a 2-layer neural network for pattern recognition. First, various RRAM processes are screened in view of the device window, analog storage, and reliability. Then, synaptic weights are stored with 5-level precision in a 4 kbit array of RRAM devices to classify the Modified National Institute of Standards and Technology (MNIST) dataset. Finally, classification performance of a 2-layer neural network is tested before and after an annealing experiment by using experimental values of conductance stored into the array, and a simulation-based analysis of inference accuracy for arrays of increasing size is presented. Our work supports material-based development of RRAM synapses for novel neural networks with high accuracy and low-power consumption.

A crucial step in order to achieve fast and low-energy switching operations in resistive random access memory (RRAM) memories is the reduction of the programming pulse width. In this study, the incremental step pulse with verify algorithm (ISPVA) was implemented by using different pulse widths between 10 $\mathsf{\mu }$ s and 50 ns and assessed on Al-doped HfO ${}_2$ 4 kbit RRAM memory arrays. The switching stability was assessed by means of an endurance test of 1k cycles. Both conductive levels and voltages needed for switching showed a remarkable good behavior along 1k reset/set cycles regardless the programming pulse width implemented. Nevertheless, the distributions of voltages as well as the amount of energy required to carry out the switching operations were definitely affected by the value of the pulse width. In addition, the data retention was evaluated after the endurance analysis by annealing the RRAM devices at 150 °C along 100 h. Just an almost negligible increase on the rate of degradation of about 1 $\mathsf{\mu }$ A at the end of the 100 h of annealing was reported between those samples programmed by employing a pulse width of 10 $\mathsf{\mu }$ s and those employing 50 ns. Finally, an endurance performance of 200k cycles without any degradation was achieved on 128 RRAM devices by using programming pulses of 100 ns width.

Logic-in-memory (LiM) circuits based on resistive random access memory (RRAM) devices and the material implication logic are promising candidates for the development of low-power computing devices that could fulfill the growing demand of distributed computing systems. However, these circuits are affected by many reliability challenges that arise from device nonidealities (e.g., variability) and the characteristics of the employed circuit architecture. Thus, an accurate investigation of the variability at the array level is needed to evaluate the reliability and performance of such circuit architectures. In this work, we explore the reliability and performance of smart IMPLY (SIMPLY) (i.e., a recently proposed LiM architecture with improved reliability and performance) on two 4-kb RRAM arrays based on different resistive switching oxides integrated in the back end of line (BEOL) of the 0.25-μm BiCMOS process. We analyze the tradeoff between reliability and energy consumption of SIMPLY architecture by exploiting the results of an extensive array-level variability characterization of the two technologies. Finally, we study the worst case performance of a full adder implemented with the SIMPLY architecture and benchmark it on the analogous CMOS implementation.

In the attempt to understand the behavior of HfO${}_2$-based resistive switching devices at low temperatures, TiN/Ti/HfO${}_2$/W metal–insulator–metal devices were fabricated; the atomic layer deposition technique was used to grow the high-k layer. After performing an electroforming process at room temperature, the device was cooled in a cryostat to carry out 100 current–voltage cycles at several temperatures ranging from the “liquid nitrogen temperature” to 350 K. The measurements showed a semiconducting behavior in high and low resistance states. In the low resistance state, a hopping conduction mechanism was obtained. The set and reset voltages increased when temperature decreased because the thermal energies for oxygen vacancies and ions were reduced. However, the temperature did not influence the power absorbed in the reset transition, indicating the local temperature in the filament controls the transition. The set transition turned from gradual to abrupt when decreasing the temperature, due to a positive feedback between the current increase and the Joule heating at low temperatures.

Due to the high number of reachable conductance levels in resistive switching devices, they are good candidates to implement artificial synaptic devices. In this work, we have studied the control of the intermediate conductance levels in HfO2-based MIM capacitors using current pulses. The set transition can be controlled in a linear way using this kind of signal. The potentiation characteristic is not affected by the pulse length due to the filament formation takes place in very short times. This behavior does not allow using identical pulses to obtain the potentiation characteristic. The transient response of the devices when applying current pulses showed the filament formation is characterized by a peak in the voltage transient signal. No depression characteristic can be obtained using current signals due to the abrupt reset transition. However, the depression characteristic can be obtained using voltage pulses, so combining both signals should allow control the synaptic weight in an appropriate way.