In this article, a novel high robust and latch-up immune electrostatic discharge (ESD) protection device, called gate-controlled low-voltage-triggered silicon-controlled rectifier (GC-LVTSCR), is proposed for 5-V I/O protection applications in the advance 40-nm CMOS technology. By incorporating a surface current diverting path with a controlling poly-silicon gate (CG) into the conventional LVTSCR, the GC-LVTSCR’s ESD characteristics can be improved and modulated with two bias conditions of CG. The first improved GC-LVTSCR structure named gate-to-body SCR (GBSCR) with the CG tied to the PWell’s body is expected to realize higher holding voltage ( $\textit{V}_{\text{h}}\text{)}$ and lower trigger voltage ( $\textit{V}_{\text{t\text{1}}}\text{)}$ , while the other structure named gate-to-drain SCR (GDSCR) using the CG connected to the bridging p $+$ region of LVTSCR is designed to gain even higher $\textit{V}_{\text{h}}$ . Measurement results show that the GBSCR has $\sim$ 11% lowered $\textit{V}_{\text{t\text{1}}}$ , $\sim$ 38% enhanced $\textit{V}_{\text{h}}$ , and improved charged device model (CDM) characteristics by comparing with the traditional LVTSCR, and the GDSCR possesses a further improved $\textit{V}_{\text{h}}$ with $\sim$ 45% higher than the GBSCR. Besides, the new devices are expected to protect 5 V or above I/O in submicrometer technologies and have been realized in a 0.18- $\mu $ m BCD process.

Self-powered photodetectors that do not require external power support are expected to play a key role in future photodetectors due to their low power characteristics, but achieving high responsivity remains a challenge. 2D van der Waals heterojunctions are a promising technology for high-performance self-powered photodetectors due to their excellent optical and electrical properties. Here, we fabricate a self-powered photodetector based on In₂Se₃/WSe₂/ReS₂ van der Waals heterojunction self-powered photodetector. Due to the presence of ReS₂ layer, photocurrent is enhanced as a result of the increase in light absorption efficiency and the effective region for generating photogenerated carriers. The built-in electric field is enhanced by a negative ‘back-gate voltage’ along the p–n junction vertical direction generated by the electrons in the photo-generated electrons accumulation layer. Accordingly, the optical responsivity and the photoresponse speed of this heterojunction self-powered photodetector are greatly boosted. The proposed self-powered photodetector based on the In₂Se₃/WSe₂/ReS₂ heterojunction exhibits a high responsivity of 438 mA W⁻¹, which is 17 times higher compared to the In₂Se₃/WSe₂ photodetector, a self-powered current (1.1 nA) that is an order of magnitude higher than that of the In₂Se₃/WSe₂ photodetector, and a fast response time that is 250% faster. Thus the self-powered photodetector with a stronger built-in electric field and a wider depletion zone can provide a new technological support for the fabrication of high responsivity, low power consumption and high speed self-powered photodetectors based on van der Waals heterojunctions.

The total ionizing dose (TID) effect significantly impacts the electrical parameters of fully depleted silicon on insulator (FDSOI) devices and even invalidates the on–off function of devices. At present, most of the irradiation research on the circuit level is focused on the single event effect, and there is very little research on the total ionizing dose effect. Therefore, this study mainly analyzes the influence of TID effects on a CMOS inverter circuit based on 22 nm FDSOI transistors. First, we constructed and calibrated an N-type FDSOI metal-oxide semiconductor (NMOS) structure and P-type FDSOI metal-oxide semiconductor (PMOS) structure. The transfer characteristics and trapped charge distribution of these devices were studied under different irradiation doses. Next, we studied the TID effect on an inverter circuit composed of these two MOS transistors. The simulation results show that when the radiation dose was 400 krad (Si), the logic threshold drift of the inverter was approximately 0.052 V. These results help further investigate the impact on integrated circuits in an irradiation environment.

The total ionizing dose (TID) effect significantly impacts the electrical parameters of fully depleted silicon on insulator (FDSOI) devices and even invalidates the on-off function of devices. At present, most of the irradiation research on the circuit level is focused on the single event effect, and the research on the total ionizing dose effect is very little. Therefore, this study mainly analyzes the influence of TID effects on a CMOS inverter circuit based on 22 nm FDSOI transistors. First, we constructed and calibrated an N-type FDSOI metal-oxide semiconductor (NMOS) structure and P-type FDSOI metal-oxide semiconductor (PMOS) structure. The transfer characteristics and trapped charge distribution of these devices were studied under different irradiation doses. Next, we studied the TID effect on an inverter circuit composed of these two MOS transistors. The simulation results show that when the radiation dose is 400 krad (Si), the logic threshold drift of the inverter is approximately 0.052 V. These results help further investigate the impact on integrated circuits in the irradiation environment.

Due to their high carrier mobility, thermal conductivity, and exceptional foldability, transition metal dichalcogenides (TMDs) present promising prospects in the realm of flexible semiconductor devices. Concurrently, tunneling field-effect transistors (TFETs) have garnered significant attention owing to their low energy consumption. This study investigates a TMD van der Waals heterojunction (VdWH) TFET, specifically by fabricating MoS₂ field-effect transistors (FETs), WSe₂ FETs, and MoS₂/WSe₂ VdWH TFETs. The N-type characteristics of the MoS₂ and P-type characteristics of WSe₂ are established through an analysis of the electrical characteristics of the respective FETs. Finally, we analyze the energy band and electrical characteristics of the MoS₂/WSe₂ VdWH TFET, which exhibits a drain current switching ratio of 10⁵. This study provides valuable insights for the development of novel low-power devices.

SiC devices have been typically subjected to extreme environments and complex stresses during operation, such as intense radiation and large diurnal amplitude differences on the lunar surface. Radiation displacement damage may lead to degradation or failure of the performance of semiconductor devices. In this paper, the effects of temperature and incidence angle on the irradiation cascade effect of 6H-SiC were investigated separately using the principles of molecular dynamics. Temperatures were set to 100 K, 150 K, 200 K, 250 K, 300 K, 350 K, 400 K and 450 K. The incidence direction was parallel to the specified crystal plane, with angles of 8°, 15°, 30°, 45°, 60° and 75° to the negative direction of the Z-axis. In this paper, the six types of defects were counted, and the microscopic distribution images and trajectories of each type of defect were extracted. The results show a linear relationship between the peak of the Frenkel pair and temperature. The recombination rate of Frenkel pairs depends on the local temperature and degree of aggregation at the center of the cascade collision. Increasing the angle of incidence first inhibits and then promotes the production of total defects and Frenkel pairs. The lowest number of total defects, Frenkel pairs and antisite defects are produced at a 45° incident angle. At an incidence angle of 75°, larger size hollow clusters and anti-clusters are more likely to appear in the 6H-SiC.